Module cranelift_codegen::isa::aarch64::inst
source · Expand description
This module defines aarch64-specific machine instruction types.
Re-exports§
Modules§
- AArch64 ISA definitions: instruction arguments.
- AArch64 ISA: binary code emission.
- AArch64 ISA definitions: immediate constants.
Structs§
- Additional information for CallInd instructions, left out of line to lower the size of the Inst enum.
- Additional information for (direct) Call instructions, left out of line to lower the size of the Inst enum.
- Additional information for
return_call[_ind]
instructions, left out of line to lower the size of theInst
enum.
Enums§
- Internal type ALUOp: defined at src/isa/aarch64/inst.isle line 986.
- Internal type ALUOp3: defined at src/isa/aarch64/inst.isle line 1024.
- Internal type AMode: defined at src/isa/aarch64/inst.isle line 1093.
- Internal type APIKey: defined at src/isa/aarch64/inst.isle line 1675.
- Internal type AtomicRMWLoopOp: defined at src/isa/aarch64/inst.isle line 1659.
- Internal type AtomicRMWOp: defined at src/isa/aarch64/inst.isle line 1644.
- Internal type BitOp: defined at src/isa/aarch64/inst.isle line 1076.
- Internal type BranchTargetType: defined at src/isa/aarch64/inst.isle line 1688.
- Internal type FPUOp1: defined at src/isa/aarch64/inst.isle line 1313.
- Internal type FPUOp2: defined at src/isa/aarch64/inst.isle line 1323.
- Internal type FPUOp3: defined at src/isa/aarch64/inst.isle line 1334.
- A floating-point unit (FPU) operation with two args, a register and an immediate.
- A floating-point unit (FPU) operation with two args, a register and an immediate that modifies its dest (so takes that input value as a separate virtual register).
- Internal type FpuRoundMode: defined at src/isa/aarch64/inst.isle line 1367.
- Internal type FpuToIntOp: defined at src/isa/aarch64/inst.isle line 1340.
- Internal type MInst: defined at src/isa/aarch64/inst.isle line 2.
- Internal type IntToFpuOp: defined at src/isa/aarch64/inst.isle line 1353.
- Different forms of label references for different instruction formats.
- Internal type MoveWideOp: defined at src/isa/aarch64/inst.isle line 1036.
- Internal type VecALUModOp: defined at src/isa/aarch64/inst.isle line 1476.
- Internal type VecALUOp: defined at src/isa/aarch64/inst.isle line 1389.
- Internal type VecExtendOp: defined at src/isa/aarch64/inst.isle line 1380.
- Internal type VecLanesOp: defined at src/isa/aarch64/inst.isle line 1617.
- Internal type VecMisc2: defined at src/isa/aarch64/inst.isle line 1487.
- Internal type VecPairOp: defined at src/isa/aarch64/inst.isle line 1598.
- Internal type VecRRLongOp: defined at src/isa/aarch64/inst.isle line 1548.
- Internal type VecRRNarrowOp: defined at src/isa/aarch64/inst.isle line 1563.
- Internal type VecRRPairLongOp: defined at src/isa/aarch64/inst.isle line 1606.
- Internal type VecRRRLongModOp: defined at src/isa/aarch64/inst.isle line 1589.
- Internal type VecRRRLongOp: defined at src/isa/aarch64/inst.isle line 1577.
- Internal type VecShiftImmModOp: defined at src/isa/aarch64/inst.isle line 1637.
- Internal type VecShiftImmOp: defined at src/isa/aarch64/inst.isle line 1626.