Available on crate feature
arm64 only.Expand description
This module defines aarch64-specific machine instruction types.
Re-exports§
Modules§
- args
- AArch64 ISA definitions: instruction arguments.
- emit
- AArch64 ISA: binary code emission.
- imms
- AArch64 ISA definitions: immediate constants.
Structs§
- Return
Call Info - Additional information for
return_call[_ind]instructions, left out of line to lower the size of theInstenum.
Enums§
- ALUOp
- Internal type ALUOp: defined at src/isa/aarch64/inst.isle line 1030.
- ALUOp3
- Internal type ALUOp3: defined at src/isa/aarch64/inst.isle line 1068.
- AMode
- Internal type AMode: defined at src/isa/aarch64/inst.isle line 1154.
- APIKey
- Internal type APIKey: defined at src/isa/aarch64/inst.isle line 1793.
- AtomicRMW
Loop Op - Internal type AtomicRMWLoopOp: defined at src/isa/aarch64/inst.isle line 1777.
- AtomicRMW
Op - Internal type AtomicRMWOp: defined at src/isa/aarch64/inst.isle line 1762.
- BitOp
- Internal type BitOp: defined at src/isa/aarch64/inst.isle line 1137.
- Branch
Target Type - Internal type BranchTargetType: defined at src/isa/aarch64/inst.isle line 1806.
- FPUOp1
- Internal type FPUOp1: defined at src/isa/aarch64/inst.isle line 1422.
- FPUOp2
- Internal type FPUOp2: defined at src/isa/aarch64/inst.isle line 1432.
- FPUOp3
- Internal type FPUOp3: defined at src/isa/aarch64/inst.isle line 1443.
- FPUOpRI
- A floating-point unit (FPU) operation with two args, a register and an immediate.
- FPUOpRI
Mod - A floating-point unit (FPU) operation with two args, a register and an immediate that modifies its dest (so takes that input value as a separate virtual register).
- FpuRound
Mode - Internal type FpuRoundMode: defined at src/isa/aarch64/inst.isle line 1483.
- FpuTo
IntOp - Internal type FpuToIntOp: defined at src/isa/aarch64/inst.isle line 1456.
- Inst
- Internal type MInst: defined at src/isa/aarch64/inst.isle line 1.
- IntTo
FpuOp - Internal type IntToFpuOp: defined at src/isa/aarch64/inst.isle line 1469.
- Label
Use - Different forms of label references for different instruction formats.
- Move
Wide Op - Internal type MoveWideOp: defined at src/isa/aarch64/inst.isle line 1080.
- VecALU
ModOp - Internal type VecALUModOp: defined at src/isa/aarch64/inst.isle line 1594.
- VecALU
Op - Internal type VecALUOp: defined at src/isa/aarch64/inst.isle line 1505.
- VecExtend
Op - Internal type VecExtendOp: defined at src/isa/aarch64/inst.isle line 1496.
- VecLanes
Op - Internal type VecLanesOp: defined at src/isa/aarch64/inst.isle line 1735.
- VecMisc2
- Internal type VecMisc2: defined at src/isa/aarch64/inst.isle line 1605.
- VecPair
Op - Internal type VecPairOp: defined at src/isa/aarch64/inst.isle line 1716.
- VecRR
Long Op - Internal type VecRRLongOp: defined at src/isa/aarch64/inst.isle line 1666.
- VecRR
Narrow Op - Internal type VecRRNarrowOp: defined at src/isa/aarch64/inst.isle line 1681.
- VecRR
Pair Long Op - Internal type VecRRPairLongOp: defined at src/isa/aarch64/inst.isle line 1724.
- VecRRR
Long ModOp - Internal type VecRRRLongModOp: defined at src/isa/aarch64/inst.isle line 1707.
- VecRRR
Long Op - Internal type VecRRRLongOp: defined at src/isa/aarch64/inst.isle line 1695.
- VecShift
ImmMod Op - Internal type VecShiftImmModOp: defined at src/isa/aarch64/inst.isle line 1755.
- VecShift
ImmOp - Internal type VecShiftImmOp: defined at src/isa/aarch64/inst.isle line 1744.