Enum ExtendedOp

Source

pub enum ExtendedOp {
Show 310 variants
    Trap(Trap),
    CallIndirectHost(CallIndirectHost),
    Xpcadd(Xpcadd),
    XmovFp(XmovFp),
    XmovLr(XmovLr),
    Bswap32(Bswap32),
    Bswap64(Bswap64),
    Xadd32UoverflowTrap(Xadd32UoverflowTrap),
    Xadd64UoverflowTrap(Xadd64UoverflowTrap),
    XMulHi64S(XMulHi64S),
    XMulHi64U(XMulHi64U),
    Xbmask32(Xbmask32),
    Xbmask64(Xbmask64),
    XLoad16BeU32O32(XLoad16BeU32O32),
    XLoad16BeS32O32(XLoad16BeS32O32),
    XLoad32BeO32(XLoad32BeO32),
    XLoad64BeO32(XLoad64BeO32),
    XStore16BeO32(XStore16BeO32),
    XStore32BeO32(XStore32BeO32),
    XStore64BeO32(XStore64BeO32),
    Fload32BeO32(Fload32BeO32),
    Fload64BeO32(Fload64BeO32),
    Fstore32BeO32(Fstore32BeO32),
    Fstore64BeO32(Fstore64BeO32),
    Fload32LeO32(Fload32LeO32),
    Fload64LeO32(Fload64LeO32),
    Fstore32LeO32(Fstore32LeO32),
    Fstore64LeO32(Fstore64LeO32),
    Fload32LeZ(Fload32LeZ),
    Fload64LeZ(Fload64LeZ),
    Fstore32LeZ(Fstore32LeZ),
    Fstore64LeZ(Fstore64LeZ),
    Fload32LeG32(Fload32LeG32),
    Fload64LeG32(Fload64LeG32),
    Fstore32LeG32(Fstore32LeG32),
    Fstore64LeG32(Fstore64LeG32),
    VLoad128O32(VLoad128O32),
    Vstore128LeO32(Vstore128LeO32),
    VLoad128Z(VLoad128Z),
    Vstore128LeZ(Vstore128LeZ),
    VLoad128G32(VLoad128G32),
    Vstore128LeG32(Vstore128LeG32),
    Fmov(Fmov),
    Vmov(Vmov),
    BitcastIntFromFloat32(BitcastIntFromFloat32),
    BitcastIntFromFloat64(BitcastIntFromFloat64),
    BitcastFloatFromInt32(BitcastFloatFromInt32),
    BitcastFloatFromInt64(BitcastFloatFromInt64),
    FConst32(FConst32),
    FConst64(FConst64),
    Feq32(Feq32),
    Fneq32(Fneq32),
    Flt32(Flt32),
    Flteq32(Flteq32),
    Feq64(Feq64),
    Fneq64(Fneq64),
    Flt64(Flt64),
    Flteq64(Flteq64),
    FSelect32(FSelect32),
    FSelect64(FSelect64),
    F32FromF64(F32FromF64),
    F64FromF32(F64FromF32),
    F32FromX32S(F32FromX32S),
    F32FromX32U(F32FromX32U),
    F32FromX64S(F32FromX64S),
    F32FromX64U(F32FromX64U),
    F64FromX32S(F64FromX32S),
    F64FromX32U(F64FromX32U),
    F64FromX64S(F64FromX64S),
    F64FromX64U(F64FromX64U),
    X32FromF32S(X32FromF32S),
    X32FromF32U(X32FromF32U),
    X32FromF64S(X32FromF64S),
    X32FromF64U(X32FromF64U),
    X64FromF32S(X64FromF32S),
    X64FromF32U(X64FromF32U),
    X64FromF64S(X64FromF64S),
    X64FromF64U(X64FromF64U),
    X32FromF32SSat(X32FromF32SSat),
    X32FromF32USat(X32FromF32USat),
    X32FromF64SSat(X32FromF64SSat),
    X32FromF64USat(X32FromF64USat),
    X64FromF32SSat(X64FromF32SSat),
    X64FromF32USat(X64FromF32USat),
    X64FromF64SSat(X64FromF64SSat),
    X64FromF64USat(X64FromF64USat),
    FCopySign32(FCopySign32),
    FCopySign64(FCopySign64),
    Fadd32(Fadd32),
    Fsub32(Fsub32),
    Vsubf32x4(Vsubf32x4),
    Fmul32(Fmul32),
    Vmulf32x4(Vmulf32x4),
    Fdiv32(Fdiv32),
    Vdivf32x4(Vdivf32x4),
    Fmaximum32(Fmaximum32),
    Fminimum32(Fminimum32),
    Ftrunc32(Ftrunc32),
    Vtrunc32x4(Vtrunc32x4),
    Vtrunc64x2(Vtrunc64x2),
    Ffloor32(Ffloor32),
    Vfloor32x4(Vfloor32x4),
    Vfloor64x2(Vfloor64x2),
    Fceil32(Fceil32),
    Vceil32x4(Vceil32x4),
    Vceil64x2(Vceil64x2),
    Fnearest32(Fnearest32),
    Fsqrt32(Fsqrt32),
    Vsqrt32x4(Vsqrt32x4),
    Vsqrt64x2(Vsqrt64x2),
    Fneg32(Fneg32),
    Vnegf32x4(Vnegf32x4),
    Fabs32(Fabs32),
    Fadd64(Fadd64),
    Fsub64(Fsub64),
    Fmul64(Fmul64),
    Fdiv64(Fdiv64),
    VDivF64x2(VDivF64x2),
    Fmaximum64(Fmaximum64),
    Fminimum64(Fminimum64),
    Ftrunc64(Ftrunc64),
    Ffloor64(Ffloor64),
    Fceil64(Fceil64),
    Fnearest64(Fnearest64),
    Vnearest32x4(Vnearest32x4),
    Vnearest64x2(Vnearest64x2),
    Fsqrt64(Fsqrt64),
    Fneg64(Fneg64),
    Fabs64(Fabs64),
    Vconst128(Vconst128),
    VAddI8x16(VAddI8x16),
    VAddI16x8(VAddI16x8),
    VAddI32x4(VAddI32x4),
    VAddI64x2(VAddI64x2),
    VAddF32x4(VAddF32x4),
    VAddF64x2(VAddF64x2),
    VAddI8x16Sat(VAddI8x16Sat),
    VAddU8x16Sat(VAddU8x16Sat),
    VAddI16x8Sat(VAddI16x8Sat),
    VAddU16x8Sat(VAddU16x8Sat),
    VAddpairwiseI16x8S(VAddpairwiseI16x8S),
    VAddpairwiseI32x4S(VAddpairwiseI32x4S),
    VShlI8x16(VShlI8x16),
    VShlI16x8(VShlI16x8),
    VShlI32x4(VShlI32x4),
    VShlI64x2(VShlI64x2),
    VShrI8x16S(VShrI8x16S),
    VShrI16x8S(VShrI16x8S),
    VShrI32x4S(VShrI32x4S),
    VShrI64x2S(VShrI64x2S),
    VShrI8x16U(VShrI8x16U),
    VShrI16x8U(VShrI16x8U),
    VShrI32x4U(VShrI32x4U),
    VShrI64x2U(VShrI64x2U),
    VSplatX8(VSplatX8),
    VSplatX16(VSplatX16),
    VSplatX32(VSplatX32),
    VSplatX64(VSplatX64),
    VSplatF32(VSplatF32),
    VSplatF64(VSplatF64),
    VLoad8x8SZ(VLoad8x8SZ),
    VLoad8x8UZ(VLoad8x8UZ),
    VLoad16x4LeSZ(VLoad16x4LeSZ),
    VLoad16x4LeUZ(VLoad16x4LeUZ),
    VLoad32x2LeSZ(VLoad32x2LeSZ),
    VLoad32x2LeUZ(VLoad32x2LeUZ),
    VBand128(VBand128),
    VBor128(VBor128),
    VBxor128(VBxor128),
    VBnot128(VBnot128),
    VBitselect128(VBitselect128),
    Vbitmask8x16(Vbitmask8x16),
    Vbitmask16x8(Vbitmask16x8),
    Vbitmask32x4(Vbitmask32x4),
    Vbitmask64x2(Vbitmask64x2),
    Valltrue8x16(Valltrue8x16),
    Valltrue16x8(Valltrue16x8),
    Valltrue32x4(Valltrue32x4),
    Valltrue64x2(Valltrue64x2),
    Vanytrue8x16(Vanytrue8x16),
    Vanytrue16x8(Vanytrue16x8),
    Vanytrue32x4(Vanytrue32x4),
    Vanytrue64x2(Vanytrue64x2),
    VF32x4FromI32x4S(VF32x4FromI32x4S),
    VF32x4FromI32x4U(VF32x4FromI32x4U),
    VF64x2FromI64x2S(VF64x2FromI64x2S),
    VF64x2FromI64x2U(VF64x2FromI64x2U),
    VI32x4FromF32x4S(VI32x4FromF32x4S),
    VI32x4FromF32x4U(VI32x4FromF32x4U),
    VI64x2FromF64x2S(VI64x2FromF64x2S),
    VI64x2FromF64x2U(VI64x2FromF64x2U),
    VWidenLow8x16S(VWidenLow8x16S),
    VWidenLow8x16U(VWidenLow8x16U),
    VWidenLow16x8S(VWidenLow16x8S),
    VWidenLow16x8U(VWidenLow16x8U),
    VWidenLow32x4S(VWidenLow32x4S),
    VWidenLow32x4U(VWidenLow32x4U),
    VWidenHigh8x16S(VWidenHigh8x16S),
    VWidenHigh8x16U(VWidenHigh8x16U),
    VWidenHigh16x8S(VWidenHigh16x8S),
    VWidenHigh16x8U(VWidenHigh16x8U),
    VWidenHigh32x4S(VWidenHigh32x4S),
    VWidenHigh32x4U(VWidenHigh32x4U),
    Vnarrow16x8S(Vnarrow16x8S),
    Vnarrow16x8U(Vnarrow16x8U),
    Vnarrow32x4S(Vnarrow32x4S),
    Vnarrow32x4U(Vnarrow32x4U),
    Vnarrow64x2S(Vnarrow64x2S),
    Vnarrow64x2U(Vnarrow64x2U),
    Vunarrow64x2U(Vunarrow64x2U),
    VFpromoteLow(VFpromoteLow),
    VFdemote(VFdemote),
    VSubI8x16(VSubI8x16),
    VSubI16x8(VSubI16x8),
    VSubI32x4(VSubI32x4),
    VSubI64x2(VSubI64x2),
    VSubF64x2(VSubF64x2),
    VSubI8x16Sat(VSubI8x16Sat),
    VSubU8x16Sat(VSubU8x16Sat),
    VSubI16x8Sat(VSubI16x8Sat),
    VSubU16x8Sat(VSubU16x8Sat),
    VMulI8x16(VMulI8x16),
    VMulI16x8(VMulI16x8),
    VMulI32x4(VMulI32x4),
    VMulI64x2(VMulI64x2),
    VMulF64x2(VMulF64x2),
    VQmulrsI16x8(VQmulrsI16x8),
    VPopcnt8x16(VPopcnt8x16),
    XExtractV8x16(XExtractV8x16),
    XExtractV16x8(XExtractV16x8),
    XExtractV32x4(XExtractV32x4),
    XExtractV64x2(XExtractV64x2),
    FExtractV32x4(FExtractV32x4),
    FExtractV64x2(FExtractV64x2),
    VInsertX8(VInsertX8),
    VInsertX16(VInsertX16),
    VInsertX32(VInsertX32),
    VInsertX64(VInsertX64),
    VInsertF32(VInsertF32),
    VInsertF64(VInsertF64),
    Veq8x16(Veq8x16),
    Vneq8x16(Vneq8x16),
    Vslt8x16(Vslt8x16),
    Vslteq8x16(Vslteq8x16),
    Vult8x16(Vult8x16),
    Vulteq8x16(Vulteq8x16),
    Veq16x8(Veq16x8),
    Vneq16x8(Vneq16x8),
    Vslt16x8(Vslt16x8),
    Vslteq16x8(Vslteq16x8),
    Vult16x8(Vult16x8),
    Vulteq16x8(Vulteq16x8),
    Veq32x4(Veq32x4),
    Vneq32x4(Vneq32x4),
    Vslt32x4(Vslt32x4),
    Vslteq32x4(Vslteq32x4),
    Vult32x4(Vult32x4),
    Vulteq32x4(Vulteq32x4),
    Veq64x2(Veq64x2),
    Vneq64x2(Vneq64x2),
    Vslt64x2(Vslt64x2),
    Vslteq64x2(Vslteq64x2),
    Vult64x2(Vult64x2),
    Vulteq64x2(Vulteq64x2),
    Vneg8x16(Vneg8x16),
    Vneg16x8(Vneg16x8),
    Vneg32x4(Vneg32x4),
    Vneg64x2(Vneg64x2),
    VnegF64x2(VnegF64x2),
    Vmin8x16S(Vmin8x16S),
    Vmin8x16U(Vmin8x16U),
    Vmin16x8S(Vmin16x8S),
    Vmin16x8U(Vmin16x8U),
    Vmax8x16S(Vmax8x16S),
    Vmax8x16U(Vmax8x16U),
    Vmax16x8S(Vmax16x8S),
    Vmax16x8U(Vmax16x8U),
    Vmin32x4S(Vmin32x4S),
    Vmin32x4U(Vmin32x4U),
    Vmax32x4S(Vmax32x4S),
    Vmax32x4U(Vmax32x4U),
    Vabs8x16(Vabs8x16),
    Vabs16x8(Vabs16x8),
    Vabs32x4(Vabs32x4),
    Vabs64x2(Vabs64x2),
    Vabsf32x4(Vabsf32x4),
    Vabsf64x2(Vabsf64x2),
    Vmaximumf32x4(Vmaximumf32x4),
    Vmaximumf64x2(Vmaximumf64x2),
    Vminimumf32x4(Vminimumf32x4),
    Vminimumf64x2(Vminimumf64x2),
    VShuffle(VShuffle),
    Vswizzlei8x16(Vswizzlei8x16),
    Vavground8x16(Vavground8x16),
    Vavground16x8(Vavground16x8),
    VeqF32x4(VeqF32x4),
    VneqF32x4(VneqF32x4),
    VltF32x4(VltF32x4),
    VlteqF32x4(VlteqF32x4),
    VeqF64x2(VeqF64x2),
    VneqF64x2(VneqF64x2),
    VltF64x2(VltF64x2),
    VlteqF64x2(VlteqF64x2),
    Vfma32x4(Vfma32x4),
    Vfma64x2(Vfma64x2),
    Vselect(Vselect),
    Xadd128(Xadd128),
    Xsub128(Xsub128),
    Xwidemul64S(Xwidemul64S),
    Xwidemul64U(Xwidemul64U),
}

Expand description

An extended operation/instruction.

These tend to be colder than Ops.

Variants§

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Trap(Trap)

Raise a trap.

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CallIndirectHost(CallIndirectHost)

A special opcode to halt interpreter execution and yield control back to the host.

This opcode results in DoneReason::CallIndirectHost where the id here is shepherded along to the embedder. It’s up to the embedder to determine what to do with the id and the current state of registers and the stack.

In Wasmtime this is used to implement interpreter-to-host calls. This is modeled as a call instruction where the first parameter is the native function pointer to invoke and all remaining parameters for the native function are in following parameter positions (e.g. x1, x2, …). The results of the host call are then store in x0.

Handling this in Wasmtime is done through a “relocation” which is resolved at link-time when raw bytecode from Cranelift is assembled into the final object that Wasmtime will interpret.

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Xpcadd(Xpcadd)

Adds offset to the pc of this instruction and stores it in dst.

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XmovFp(XmovFp)

Gets the special “fp” register and moves it into dst.

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XmovLr(XmovLr)

Gets the special “lr” register and moves it into dst.

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Bswap32(Bswap32)

dst = byteswap(low32(src))

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Bswap64(Bswap64)

dst = byteswap(src)

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Xadd32UoverflowTrap(Xadd32UoverflowTrap)

32-bit checked unsigned addition: low32(dst) = low32(src1) + low32(src2).

The upper 32-bits of dst are unmodified. Traps if the addition overflows.

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Xadd64UoverflowTrap(Xadd64UoverflowTrap)

64-bit checked unsigned addition: dst = src1 + src2.

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XMulHi64S(XMulHi64S)

dst = high64(src1 * src2) (signed)

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XMulHi64U(XMulHi64U)

dst = high64(src1 * src2) (unsigned)

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Xbmask32(Xbmask32)

low32(dst) = if low32(src) == 0 { 0 } else { -1 }

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Xbmask64(Xbmask64)

dst = if src == 0 { 0 } else { -1 }

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XLoad16BeU32O32(XLoad16BeU32O32)

low32(dst) = zext(*addr)

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XLoad16BeS32O32(XLoad16BeS32O32)

low32(dst) = sext(*addr)

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XLoad32BeO32(XLoad32BeO32)

low32(dst) = zext(*addr)

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XLoad64BeO32(XLoad64BeO32)

dst = *addr

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XStore16BeO32(XStore16BeO32)

*addr = low16(src)

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XStore32BeO32(XStore32BeO32)

*addr = low32(src)

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XStore64BeO32(XStore64BeO32)

*addr = low64(src)

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Fload32BeO32(Fload32BeO32)

low32(dst) = zext(*addr)

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Fload64BeO32(Fload64BeO32)

dst = *addr

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Fstore32BeO32(Fstore32BeO32)

*addr = low32(src)

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Fstore64BeO32(Fstore64BeO32)

*addr = src

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Fload32LeO32(Fload32LeO32)

low32(dst) = zext(*addr)

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Fload64LeO32(Fload64LeO32)

dst = *addr

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Fstore32LeO32(Fstore32LeO32)

*addr = low32(src)

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Fstore64LeO32(Fstore64LeO32)

*addr = src

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Fload32LeZ(Fload32LeZ)

low32(dst) = zext(*addr)

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Fload64LeZ(Fload64LeZ)

dst = *addr

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Fstore32LeZ(Fstore32LeZ)

*addr = low32(src)

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Fstore64LeZ(Fstore64LeZ)

*addr = src

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Fload32LeG32(Fload32LeG32)

low32(dst) = zext(*addr)

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Fload64LeG32(Fload64LeG32)

dst = *addr

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Fstore32LeG32(Fstore32LeG32)

*addr = low32(src)

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Fstore64LeG32(Fstore64LeG32)

*addr = src

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VLoad128O32(VLoad128O32)

dst = *addr

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Vstore128LeO32(Vstore128LeO32)

*addr = src

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VLoad128Z(VLoad128Z)

dst = *(ptr + offset)

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Vstore128LeZ(Vstore128LeZ)

*(ptr + offset) = src

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VLoad128G32(VLoad128G32)

dst = *(ptr + offset)

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Vstore128LeG32(Vstore128LeG32)

*(ptr + offset) = src

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Fmov(Fmov)

Move between f registers.

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Vmov(Vmov)

Move between v registers.

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BitcastIntFromFloat32(BitcastIntFromFloat32)

low32(dst) = bitcast low32(src) as i32

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BitcastIntFromFloat64(BitcastIntFromFloat64)

dst = bitcast src as i64

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BitcastFloatFromInt32(BitcastFloatFromInt32)

low32(dst) = bitcast low32(src) as f32

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BitcastFloatFromInt64(BitcastFloatFromInt64)

dst = bitcast src as f64

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FConst32(FConst32)

low32(dst) = bits

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FConst64(FConst64)

dst = bits

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Feq32(Feq32)

low32(dst) = zext(src1 == src2)

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Fneq32(Fneq32)

low32(dst) = zext(src1 != src2)

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Flt32(Flt32)

low32(dst) = zext(src1 < src2)

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Flteq32(Flteq32)

low32(dst) = zext(src1 <= src2)

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Feq64(Feq64)

low32(dst) = zext(src1 == src2)

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Fneq64(Fneq64)

low32(dst) = zext(src1 != src2)

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Flt64(Flt64)

low32(dst) = zext(src1 < src2)

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Flteq64(Flteq64)

low32(dst) = zext(src1 <= src2)

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FSelect32(FSelect32)

low32(dst) = low32(cond) ? low32(if_nonzero) : low32(if_zero)

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FSelect64(FSelect64)

dst = low32(cond) ? if_nonzero : if_zero

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F32FromF64(F32FromF64)

low32(dst) = demote(src)

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F64FromF32(F64FromF32)

(st) = promote(low32(src))

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F32FromX32S(F32FromX32S)

low32(dst) = checked_f32_from_signed(low32(src))

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F32FromX32U(F32FromX32U)

low32(dst) = checked_f32_from_unsigned(low32(src))

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F32FromX64S(F32FromX64S)

low32(dst) = checked_f32_from_signed(src)

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F32FromX64U(F32FromX64U)

low32(dst) = checked_f32_from_unsigned(src)

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F64FromX32S(F64FromX32S)

dst = checked_f64_from_signed(low32(src))

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F64FromX32U(F64FromX32U)

dst = checked_f64_from_unsigned(low32(src))

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F64FromX64S(F64FromX64S)

dst = checked_f64_from_signed(src)

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F64FromX64U(F64FromX64U)

dst = checked_f64_from_unsigned(src)

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X32FromF32S(X32FromF32S)

low32(dst) = checked_signed_from_f32(low32(src))

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X32FromF32U(X32FromF32U)

low32(dst) = checked_unsigned_from_f32(low32(src))

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X32FromF64S(X32FromF64S)

low32(dst) = checked_signed_from_f64(src)

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X32FromF64U(X32FromF64U)

low32(dst) = checked_unsigned_from_f64(src)

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X64FromF32S(X64FromF32S)

dst = checked_signed_from_f32(low32(src))

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X64FromF32U(X64FromF32U)

dst = checked_unsigned_from_f32(low32(src))

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X64FromF64S(X64FromF64S)

dst = checked_signed_from_f64(src)

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X64FromF64U(X64FromF64U)

dst = checked_unsigned_from_f64(src)

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X32FromF32SSat(X32FromF32SSat)

low32(dst) = saturating_signed_from_f32(low32(src))

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X32FromF32USat(X32FromF32USat)

low32(dst) = saturating_unsigned_from_f32(low32(src))

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X32FromF64SSat(X32FromF64SSat)

low32(dst) = saturating_signed_from_f64(src)

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X32FromF64USat(X32FromF64USat)

low32(dst) = saturating_unsigned_from_f64(src)

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X64FromF32SSat(X64FromF32SSat)

dst = saturating_signed_from_f32(low32(src))

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X64FromF32USat(X64FromF32USat)

dst = saturating_unsigned_from_f32(low32(src))

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X64FromF64SSat(X64FromF64SSat)

dst = saturating_signed_from_f64(src)

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X64FromF64USat(X64FromF64USat)

dst = saturating_unsigned_from_f64(src)

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FCopySign32(FCopySign32)

low32(dst) = copysign(low32(src1), low32(src2))

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FCopySign64(FCopySign64)

dst = copysign(src1, src2)

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Fadd32(Fadd32)

low32(dst) = low32(src1) + low32(src2)

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Fsub32(Fsub32)

low32(dst) = low32(src1) - low32(src2)

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Vsubf32x4(Vsubf32x4)

low128(dst) = low128(src1) - low128(src2)

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Fmul32(Fmul32)

low32(dst) = low32(src1) * low32(src2)

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Vmulf32x4(Vmulf32x4)

low128(dst) = low128(src1) * low128(src2)

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Fdiv32(Fdiv32)

low32(dst) = low32(src1) / low32(src2)

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Vdivf32x4(Vdivf32x4)

low128(dst) = low128(src1) / low128(src2)

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Fmaximum32(Fmaximum32)

low32(dst) = ieee_maximum(low32(src1), low32(src2))

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Fminimum32(Fminimum32)

low32(dst) = ieee_minimum(low32(src1), low32(src2))

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Ftrunc32(Ftrunc32)

low32(dst) = ieee_trunc(low32(src))

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Vtrunc32x4(Vtrunc32x4)

low128(dst) = ieee_trunc(low128(src))

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Vtrunc64x2(Vtrunc64x2)

low128(dst) = ieee_trunc(low128(src))

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Ffloor32(Ffloor32)

low32(dst) = ieee_floor(low32(src))

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Vfloor32x4(Vfloor32x4)

low128(dst) = ieee_floor(low128(src))

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Vfloor64x2(Vfloor64x2)

low128(dst) = ieee_floor(low128(src))

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Fceil32(Fceil32)

low32(dst) = ieee_ceil(low32(src))

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Vceil32x4(Vceil32x4)

low128(dst) = ieee_ceil(low128(src))

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Vceil64x2(Vceil64x2)

low128(dst) = ieee_ceil(low128(src))

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Fnearest32(Fnearest32)

low32(dst) = ieee_nearest(low32(src))

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Fsqrt32(Fsqrt32)

low32(dst) = ieee_sqrt(low32(src))

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Vsqrt32x4(Vsqrt32x4)

low32(dst) = ieee_sqrt(low32(src))

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Vsqrt64x2(Vsqrt64x2)

low32(dst) = ieee_sqrt(low32(src))

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Fneg32(Fneg32)

low32(dst) = -low32(src)

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Vnegf32x4(Vnegf32x4)

low128(dst) = -low128(src)

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Fabs32(Fabs32)

low32(dst) = |low32(src)|

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Fadd64(Fadd64)

dst = src1 + src2

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Fsub64(Fsub64)

dst = src1 - src2

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Fmul64(Fmul64)

dst = src1 * src2

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Fdiv64(Fdiv64)

dst = src1 / src2

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VDivF64x2(VDivF64x2)

dst = src1 / src2

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Fmaximum64(Fmaximum64)

dst = ieee_maximum(src1, src2)

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Fminimum64(Fminimum64)

dst = ieee_minimum(src1, src2)

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Ftrunc64(Ftrunc64)

dst = ieee_trunc(src)

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Ffloor64(Ffloor64)

dst = ieee_floor(src)

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Fceil64(Fceil64)

dst = ieee_ceil(src)

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Fnearest64(Fnearest64)

dst = ieee_nearest(src)

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Vnearest32x4(Vnearest32x4)

low128(dst) = ieee_nearest(low128(src))

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Vnearest64x2(Vnearest64x2)

low128(dst) = ieee_nearest(low128(src))

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Fsqrt64(Fsqrt64)

dst = ieee_sqrt(src)

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Fneg64(Fneg64)

dst = -src

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Fabs64(Fabs64)

dst = |src|

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Vconst128(Vconst128)

dst = imm

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VAddI8x16(VAddI8x16)

dst = src1 + src2

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VAddI16x8(VAddI16x8)

dst = src1 + src2

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VAddI32x4(VAddI32x4)

dst = src1 + src2

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VAddI64x2(VAddI64x2)

dst = src1 + src2

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VAddF32x4(VAddF32x4)

dst = src1 + src2

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VAddF64x2(VAddF64x2)

dst = src1 + src2

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VAddI8x16Sat(VAddI8x16Sat)

dst = satruating_add(src1, src2)

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VAddU8x16Sat(VAddU8x16Sat)

dst = satruating_add(src1, src2)

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VAddI16x8Sat(VAddI16x8Sat)

dst = satruating_add(src1, src2)

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VAddU16x8Sat(VAddU16x8Sat)

dst = satruating_add(src1, src2)

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VAddpairwiseI16x8S(VAddpairwiseI16x8S)

dst = [src1[0] + src1[1], ..., src2[6] + src2[7]]

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VAddpairwiseI32x4S(VAddpairwiseI32x4S)

dst = [src1[0] + src1[1], ..., src2[2] + src2[3]]

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VShlI8x16(VShlI8x16)

dst = src1 << src2

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VShlI16x8(VShlI16x8)

dst = src1 << src2

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VShlI32x4(VShlI32x4)

dst = src1 << src2

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VShlI64x2(VShlI64x2)

dst = src1 << src2

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VShrI8x16S(VShrI8x16S)

dst = src1 >> src2 (signed)

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VShrI16x8S(VShrI16x8S)

dst = src1 >> src2 (signed)

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VShrI32x4S(VShrI32x4S)

dst = src1 >> src2 (signed)

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VShrI64x2S(VShrI64x2S)

dst = src1 >> src2 (signed)

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VShrI8x16U(VShrI8x16U)

dst = src1 >> src2 (unsigned)

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VShrI16x8U(VShrI16x8U)

dst = src1 >> src2 (unsigned)

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VShrI32x4U(VShrI32x4U)

dst = src1 >> src2 (unsigned)

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VShrI64x2U(VShrI64x2U)

dst = src1 >> src2 (unsigned)

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VSplatX8(VSplatX8)

dst = splat(low8(src))

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VSplatX16(VSplatX16)

dst = splat(low16(src))

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VSplatX32(VSplatX32)

dst = splat(low32(src))

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VSplatX64(VSplatX64)

dst = splat(src)

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VSplatF32(VSplatF32)

dst = splat(low32(src))

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VSplatF64(VSplatF64)

dst = splat(src)

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VLoad8x8SZ(VLoad8x8SZ)

Load the 64-bit source as i8x8 and sign-extend to i16x8.

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VLoad8x8UZ(VLoad8x8UZ)

Load the 64-bit source as u8x8 and zero-extend to i16x8.

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VLoad16x4LeSZ(VLoad16x4LeSZ)

Load the 64-bit source as i16x4 and sign-extend to i32x4.

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VLoad16x4LeUZ(VLoad16x4LeUZ)

Load the 64-bit source as u16x4 and zero-extend to i32x4.

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VLoad32x2LeSZ(VLoad32x2LeSZ)

Load the 64-bit source as i32x2 and sign-extend to i64x2.

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VLoad32x2LeUZ(VLoad32x2LeUZ)

Load the 64-bit source as u32x2 and zero-extend to i64x2.

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VBand128(VBand128)

dst = src1 & src2

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VBor128(VBor128)

dst = src1 | src2

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VBxor128(VBxor128)

dst = src1 ^ src2

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VBnot128(VBnot128)

dst = !src1

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VBitselect128(VBitselect128)

dst = (c & x) | (!c & y)

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Vbitmask8x16(Vbitmask8x16)

Collect high bits of each lane into the low 32-bits of the destination.

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Vbitmask16x8(Vbitmask16x8)

Collect high bits of each lane into the low 32-bits of the destination.

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Vbitmask32x4(Vbitmask32x4)

Collect high bits of each lane into the low 32-bits of the destination.

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Vbitmask64x2(Vbitmask64x2)

Collect high bits of each lane into the low 32-bits of the destination.

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Valltrue8x16(Valltrue8x16)

Store whether all lanes are nonzero in dst.

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Valltrue16x8(Valltrue16x8)

Store whether all lanes are nonzero in dst.

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Valltrue32x4(Valltrue32x4)

Store whether all lanes are nonzero in dst.

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Valltrue64x2(Valltrue64x2)

Store whether any lanes are nonzero in dst.

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Vanytrue8x16(Vanytrue8x16)

Store whether any lanes are nonzero in dst.

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Vanytrue16x8(Vanytrue16x8)

Store whether any lanes are nonzero in dst.

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Vanytrue32x4(Vanytrue32x4)

Store whether any lanes are nonzero in dst.

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Vanytrue64x2(Vanytrue64x2)

Store whether any lanes are nonzero in dst.

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VF32x4FromI32x4S(VF32x4FromI32x4S)

Int-to-float conversion (same as f32_from_x32_s)

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VF32x4FromI32x4U(VF32x4FromI32x4U)

Int-to-float conversion (same as f32_from_x32_u)

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VF64x2FromI64x2S(VF64x2FromI64x2S)

Int-to-float conversion (same as f64_from_x64_s)

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VF64x2FromI64x2U(VF64x2FromI64x2U)

Int-to-float conversion (same as f64_from_x64_u)

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VI32x4FromF32x4S(VI32x4FromF32x4S)

Float-to-int conversion (same as x32_from_f32_s

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VI32x4FromF32x4U(VI32x4FromF32x4U)

Float-to-int conversion (same as x32_from_f32_u

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VI64x2FromF64x2S(VI64x2FromF64x2S)

Float-to-int conversion (same as x64_from_f64_s

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VI64x2FromF64x2U(VI64x2FromF64x2U)

Float-to-int conversion (same as x64_from_f64_u

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VWidenLow8x16S(VWidenLow8x16S)

Widens the low lanes of the input vector, as signed, to twice the width.

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VWidenLow8x16U(VWidenLow8x16U)

Widens the low lanes of the input vector, as unsigned, to twice the width.

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VWidenLow16x8S(VWidenLow16x8S)

Widens the low lanes of the input vector, as signed, to twice the width.

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VWidenLow16x8U(VWidenLow16x8U)

Widens the low lanes of the input vector, as unsigned, to twice the width.

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VWidenLow32x4S(VWidenLow32x4S)

Widens the low lanes of the input vector, as signed, to twice the width.

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VWidenLow32x4U(VWidenLow32x4U)

Widens the low lanes of the input vector, as unsigned, to twice the width.

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VWidenHigh8x16S(VWidenHigh8x16S)

Widens the high lanes of the input vector, as signed, to twice the width.

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VWidenHigh8x16U(VWidenHigh8x16U)

Widens the high lanes of the input vector, as unsigned, to twice the width.

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VWidenHigh16x8S(VWidenHigh16x8S)

Widens the high lanes of the input vector, as signed, to twice the width.

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VWidenHigh16x8U(VWidenHigh16x8U)

Widens the high lanes of the input vector, as unsigned, to twice the width.

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VWidenHigh32x4S(VWidenHigh32x4S)

Widens the high lanes of the input vector, as signed, to twice the width.

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VWidenHigh32x4U(VWidenHigh32x4U)

Widens the high lanes of the input vector, as unsigned, to twice the width.

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Vnarrow16x8S(Vnarrow16x8S)

Narrows the two 16x8 vectors, assuming all input lanes are signed, to half the width. Narrowing is signed and saturating.

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Vnarrow16x8U(Vnarrow16x8U)

Narrows the two 16x8 vectors, assuming all input lanes are signed, to half the width. Narrowing is unsigned and saturating.

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Vnarrow32x4S(Vnarrow32x4S)

Narrows the two 32x4 vectors, assuming all input lanes are signed, to half the width. Narrowing is signed and saturating.

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Vnarrow32x4U(Vnarrow32x4U)

Narrows the two 32x4 vectors, assuming all input lanes are signed, to half the width. Narrowing is unsigned and saturating.

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Vnarrow64x2S(Vnarrow64x2S)

Narrows the two 64x2 vectors, assuming all input lanes are signed, to half the width. Narrowing is signed and saturating.

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Vnarrow64x2U(Vnarrow64x2U)

Narrows the two 64x2 vectors, assuming all input lanes are signed, to half the width. Narrowing is unsigned and saturating.

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Vunarrow64x2U(Vunarrow64x2U)

Narrows the two 64x2 vectors, assuming all input lanes are unsigned, to half the width. Narrowing is unsigned and saturating.

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VFpromoteLow(VFpromoteLow)

Promotes the low two lanes of the f32x4 input to f64x2.

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VFdemote(VFdemote)

Demotes the two f64x2 lanes to f32x2 and then extends with two more zero lanes.

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VSubI8x16(VSubI8x16)

dst = src1 - src2

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VSubI16x8(VSubI16x8)

dst = src1 - src2

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VSubI32x4(VSubI32x4)

dst = src1 - src2

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VSubI64x2(VSubI64x2)

dst = src1 - src2

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VSubF64x2(VSubF64x2)

dst = src1 - src2

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VSubI8x16Sat(VSubI8x16Sat)

dst = saturating_sub(src1, src2)

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VSubU8x16Sat(VSubU8x16Sat)

dst = saturating_sub(src1, src2)

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VSubI16x8Sat(VSubI16x8Sat)

dst = saturating_sub(src1, src2)

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VSubU16x8Sat(VSubU16x8Sat)

dst = saturating_sub(src1, src2)

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VMulI8x16(VMulI8x16)

dst = src1 * src2

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VMulI16x8(VMulI16x8)

dst = src1 * src2

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VMulI32x4(VMulI32x4)

dst = src1 * src2

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VMulI64x2(VMulI64x2)

dst = src1 * src2

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VMulF64x2(VMulF64x2)

dst = src1 * src2

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VQmulrsI16x8(VQmulrsI16x8)

dst = signed_saturate(src1 * src2 + (1 << (Q - 1)) >> Q)

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VPopcnt8x16(VPopcnt8x16)

dst = count_ones(src)

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XExtractV8x16(XExtractV8x16)

low32(dst) = zext(src[lane])

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XExtractV16x8(XExtractV16x8)

low32(dst) = zext(src[lane])

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XExtractV32x4(XExtractV32x4)

low32(dst) = src[lane]

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XExtractV64x2(XExtractV64x2)

dst = src[lane]

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FExtractV32x4(FExtractV32x4)

low32(dst) = src[lane]

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