Struct Riscv64Backend

pub struct Riscv64Backend { /* private fields */ }

An riscv64 backend.

Implementations

impl Riscv64Backend

pub fn new_with_flags( triple: Triple, flags: Flags, isa_flags: Flags, ) -> Riscv64Backend

Create a new riscv64 backend with the given (shared) flags.

Trait Implementations

impl Display for Riscv64Backend

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl TargetIsa for Riscv64Backend

fn compile_function( &self, func: &Function, domtree: &DominatorTree, want_disasm: bool, ctrl_plane: &mut ControlPlane, ) -> Result<CompiledCodeBase<Stencil>, CodegenError>

Compile the given function.

fn name(&self) -> &'static str

Get the name of this ISA.

fn dynamic_vector_bytes(&self, _dynamic_ty: Type) -> u32

Get the ISA-dependent maximum vector register size, in bytes.

fn triple(&self) -> &Triple

Get the target triple that was used to make this trait object.

fn flags(&self) -> &Flags

Get the ISA-independent flags that were used to make this trait object.

fn isa_flags(&self) -> Vec<Value>

Get the ISA-dependent flag values that were used to make this trait object.

fn emit_unwind_info( &self, result: &CompiledCodeBase<Final>, kind: UnwindInfoKind, ) -> Result<Option<UnwindInfo>, CodegenError>

Creates unwind information for the function.

fn create_systemv_cie(&self) -> Option<CommonInformationEntry>

Creates a new System V Common Information Entry for the ISA.

fn text_section_builder(&self, num_funcs: usize) -> Box<dyn TextSectionBuilder>

Returns an object that can be used to build the text section of an executable.

fn map_regalloc_reg_to_dwarf( &self, reg: Reg, ) -> Result<u16, RegisterMappingError>

Map a regalloc::Reg to its corresponding DWARF register.

fn function_alignment(&self) -> FunctionAlignment

Returns the minimum function alignment and the preferred function alignment, for performance, required by this ISA.

fn page_size_align_log2(&self) -> u8

The log2 of the target’s page size and alignment.

fn to_capstone(&self) -> Result<Capstone, Error>

Generate a Capstone context for disassembling bytecode for this architecture.

fn has_native_fma(&self) -> bool

Returns whether this ISA has a native fused-multiply-and-add instruction for floats.

fn has_x86_blendv_lowering(&self, _: Type) -> bool

Returns whether the CLIF x86_blendv instruction is implemented for this ISA for the specified type.

fn has_x86_pshufb_lowering(&self) -> bool

Returns whether the CLIF x86_pshufb instruction is implemented for this ISA.

fn has_x86_pmulhrsw_lowering(&self) -> bool

Returns whether the CLIF x86_pmulhrsw instruction is implemented for this ISA.

fn has_x86_pmaddubsw_lowering(&self) -> bool

Returns whether the CLIF x86_pmaddubsw instruction is implemented for this ISA.

fn is_branch_protection_enabled(&self) -> bool

Get a flag indicating whether branch protection is enabled.

fn wrapped(self) -> Arc<dyn TargetIsa>

where Self: Sized + 'static,

Create a polymorphic TargetIsa from this specific implementation.