cranelift_assembler_x64_meta/instructions/
atomic.rs

1use crate::dsl::{Customization::*, Feature::*, Inst, Location::*};
2use crate::dsl::{fmt, implicit, inst, r, rex, rw};
3
4#[rustfmt::skip] // Keeps instructions on a single line.
5pub fn list() -> Vec<Inst> {
6    // This is a bit long so it's extracted out here and shared below since it's
7    // just the encoding of `cmpxchg16b` and `lock_cmpxchg16b` that differ.
8    let cmpxchg16b_m = fmt("M", [rw(implicit(rax)), rw(implicit(rdx)), r(implicit(rbx)), r(implicit(rcx)), rw(m128)]);
9
10    vec![
11        // Note that for xchg the "MR" variants are omitted from the Intel
12        // manual as they have the exact same encoding as the "RM" variant.
13        // Additionally the "O" variants are omitted as they're just exchanging
14        // registers which isn't needed by Cranelift at this time.
15        //
16        // Also note that these have a custom display implementation to swap the
17        // order of the operands to match what Capstone prints.
18        inst("xchgb", fmt("RM", [rw(r8), rw(m8)]), rex(0x86).r(), _64b | compat).custom(Display),
19        inst("xchgw", fmt("RM", [rw(r16), rw(m16)]), rex([0x66, 0x87]).r(), _64b | compat).custom(Display),
20        inst("xchgl", fmt("RM", [rw(r32), rw(m32)]), rex(0x87).r(), _64b | compat).custom(Display),
21        inst("xchgq", fmt("RM", [rw(r64), rw(m64)]), rex(0x87).w().r(), _64b).custom(Display),
22
23        inst("cmpxchg16b", cmpxchg16b_m.clone(), rex([0x0f, 0xc7]).digit(1).w(), _64b | cmpxchg16b),
24        inst("lock_cmpxchg16b", cmpxchg16b_m.clone(), rex([0xf0, 0x0f, 0xc7]).digit(1).w(), _64b | cmpxchg16b).custom(Mnemonic),
25
26        inst("cmpxchgb", fmt("MR", [rw(rm8), r(r8), rw(implicit(al))]), rex([0x0f, 0xb0]).r(), _64b | compat),
27        inst("cmpxchgw", fmt("MR", [rw(rm16), r(r16), rw(implicit(ax))]), rex([0x66, 0x0f, 0xb1]).r(), _64b | compat),
28        inst("cmpxchgl", fmt("MR", [rw(rm32), r(r32), rw(implicit(eax))]), rex([0x0f, 0xb1]).r(), _64b | compat),
29        inst("cmpxchgq", fmt("MR", [rw(rm64), r(r64), rw(implicit(rax))]), rex([0x0f, 0xb1]).w().r(), _64b | compat),
30        inst("lock_cmpxchgb", fmt("MR", [rw(m8), r(r8), rw(implicit(al))]), rex([0xf0, 0x0f, 0xb0]).r(), _64b | compat).custom(Mnemonic),
31        inst("lock_cmpxchgw", fmt("MR", [rw(m16), r(r16), rw(implicit(ax))]), rex([0xf0, 0x66, 0x0f, 0xb1]).r(), _64b | compat).custom(Mnemonic),
32        inst("lock_cmpxchgl", fmt("MR", [rw(m32), r(r32), rw(implicit(eax))]), rex([0xf0, 0x0f, 0xb1]).r(), _64b | compat).custom(Mnemonic),
33        inst("lock_cmpxchgq", fmt("MR", [rw(m64), r(r64), rw(implicit(rax))]), rex([0xf0, 0x0f, 0xb1]).w().r(), _64b | compat).custom(Mnemonic),
34    ]
35}
cranelift_assembler_x64_meta/instructions/atomic.rs

cranelift_assembler_x64_meta/instructions/
atomic.rs
