Expand description
Expose all known instructions as Rust structs; this is generated in
build.rs.
See also: Inst, an enum containing all these instructions.
Structsยง
- adcb_i
adcb: I(al[rw], imm8) => 0x14 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcb_mi
adcb: MI(rm8[rw], imm8) => 0x80 /2 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcb_mr
adcb: MR(rm8[rw], r8) => 0x10 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcb_rm
adcb: RM(r8[rw], rm8) => 0x12 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcl_i
adcl: I(eax[rw], imm32) => 0x15 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcl_mi
adcl: MI(rm32[rw], imm32) => 0x81 /2 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcl_
mi_ sxb adcl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /2 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcl_mr
adcl: MR(rm32[rw], r32) => 0x11 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcl_rm
adcl: RM(r32[rw], rm32) => 0x13 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcq_
i_ sxl adcq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x15 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcq_
mi_ sxb adcq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /2 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcq_
mi_ sxl adcq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /2 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcq_mr
adcq: MR(rm64[rw], r64) => REX.W + 0x11 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcq_rm
adcq: RM(r64[rw], rm64) => REX.W + 0x13 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcw_i
adcw: I(ax[rw], imm16) => 0x66 + 0x15 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcw_mi
adcw: MI(rm16[rw], imm16) => 0x66 + 0x81 /2 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcw_mr
adcw: MR(rm16[rw], r16) => 0x66 + 0x11 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- adcw_rm
adcw: RM(r16[rw], rm16) => 0x66 + 0x13 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addb_i
addb: I(al[rw], imm8) => 0x04 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addb_mi
addb: MI(rm8[rw], imm8) => 0x80 /0 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addb_mr
addb: MR(rm8[rw], r8) => 0x00 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addb_rm
addb: RM(r8[rw], rm8) => 0x02 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addl_i
addl: I(eax[rw], imm32) => 0x05 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addl_mi
addl: MI(rm32[rw], imm32) => 0x81 /0 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addl_
mi_ sxb addl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /0 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addl_mr
addl: MR(rm32[rw], r32) => 0x01 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addl_rm
addl: RM(r32[rw], rm32) => 0x03 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addpd_a
addpd: A(xmm[rw], rm128[align]) => 0x66 + 0x0F + 0x58 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addps_a
addps: A(xmm[rw], rm128[align]) => 0x0F + 0x58 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addq_
i_ sxl addq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x05 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addq_
mi_ sxb addq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /0 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addq_
mi_ sxl addq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /0 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addq_mr
addq: MR(rm64[rw], r64) => REX.W + 0x01 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addq_rm
addq: RM(r64[rw], rm64) => REX.W + 0x03 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addw_i
addw: I(ax[rw], imm16) => 0x66 + 0x05 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addw_mi
addw: MI(rm16[rw], imm16) => 0x66 + 0x81 /0 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addw_mr
addw: MR(rm16[rw], r16) => 0x66 + 0x01 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- addw_rm
addw: RM(r16[rw], rm16) => 0x66 + 0x03 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andb_i
andb: I(al[rw], imm8) => 0x24 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andb_mi
andb: MI(rm8[rw], imm8) => 0x80 /4 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andb_mr
andb: MR(rm8[rw], r8) => 0x20 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andb_rm
andb: RM(r8[rw], rm8) => 0x22 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andl_i
andl: I(eax[rw], imm32) => 0x25 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andl_mi
andl: MI(rm32[rw], imm32) => 0x81 /4 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andl_
mi_ sxb andl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /4 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andl_mr
andl: MR(rm32[rw], r32) => 0x21 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andl_rm
andl: RM(r32[rw], rm32) => 0x23 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andpd_a
andpd: A(xmm[rw], rm128[align]) => 0x66 + 0x0F + 0x54 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andps_a
andps: A(xmm[rw], rm128[align]) => 0x0F + 0x54 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andq_
i_ sxl andq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x25 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andq_
mi_ sxb andq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /4 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andq_
mi_ sxl andq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /4 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andq_mr
andq: MR(rm64[rw], r64) => REX.W + 0x21 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andq_rm
andq: RM(r64[rw], rm64) => REX.W + 0x23 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andw_i
andw: I(ax[rw], imm16) => 0x66 + 0x25 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andw_mi
andw: MI(rm16[rw], imm16) => 0x66 + 0x81 /4 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andw_mr
andw: MR(rm16[rw], r16) => 0x66 + 0x21 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- andw_rm
andw: RM(r16[rw], rm16) => 0x66 + 0x23 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcb_ mi lock_adcb: MI(m8[rw], imm8) => 0xF0 + 0x80 /2 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcb_ mr lock_adcb: MR(m8[rw], r8) => 0xF0 + 0x10 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcl_ mi lock_adcl: MI(m32[rw], imm32) => 0xF0 + 0x81 /2 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcl_ mi_ sxb lock_adcl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /2 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcl_ mr lock_adcl: MR(m32[rw], r32) => 0xF0 + 0x11 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcq_ mi_ sxb lock_adcq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /2 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcq_ mi_ sxl lock_adcq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /2 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcq_ mr lock_adcq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x11 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcw_ mi lock_adcw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /2 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
adcw_ mr lock_adcw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x11 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addb_ mi lock_addb: MI(m8[rw], imm8) => 0xF0 + 0x80 /0 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addb_ mr lock_addb: MR(m8[rw], r8) => 0xF0 + 0x00 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addl_ mi lock_addl: MI(m32[rw], imm32) => 0xF0 + 0x81 /0 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addl_ mi_ sxb lock_addl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /0 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addl_ mr lock_addl: MR(m32[rw], r32) => 0xF0 + 0x01 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addq_ mi_ sxb lock_addq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /0 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addq_ mi_ sxl lock_addq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /0 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addq_ mr lock_addq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x01 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addw_ mi lock_addw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /0 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
addw_ mr lock_addw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x01 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andb_ mi lock_andb: MI(m8[rw], imm8) => 0xF0 + 0x80 /4 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andb_ mr lock_andb: MR(m8[rw], r8) => 0xF0 + 0x20 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andl_ mi lock_andl: MI(m32[rw], imm32) => 0xF0 + 0x81 /4 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andl_ mi_ sxb lock_andl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /4 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andl_ mr lock_andl: MR(m32[rw], r32) => 0xF0 + 0x21 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andq_ mi_ sxb lock_andq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /4 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andq_ mi_ sxl lock_andq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /4 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andq_ mr lock_andq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x21 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andw_ mi lock_andw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /4 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
andw_ mr lock_andw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x21 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orb_ mi lock_orb: MI(m8[rw], imm8) => 0xF0 + 0x80 /1 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orb_ mr lock_orb: MR(m8[rw], r8) => 0xF0 + 0x08 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orl_ mi lock_orl: MI(m32[rw], imm32) => 0xF0 + 0x81 /1 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orl_ mi_ sxb lock_orl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /1 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orl_ mr lock_orl: MR(m32[rw], r32) => 0xF0 + 0x09 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orq_ mi_ sxb lock_orq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /1 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orq_ mi_ sxl lock_orq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /1 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orq_ mr lock_orq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x09 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orw_ mi lock_orw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /1 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
orw_ mr lock_orw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x09 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbb_ mi lock_sbbb: MI(m8[rw], imm8) => 0xF0 + 0x80 /3 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbb_ mr lock_sbbb: MR(m8[rw], r8) => 0xF0 + 0x18 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbl_ mi lock_sbbl: MI(m32[rw], imm32) => 0xF0 + 0x81 /3 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbl_ mi_ sxb lock_sbbl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /3 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbl_ mr lock_sbbl: MR(m32[rw], r32) => 0xF0 + 0x19 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbq_ mi_ sxb lock_sbbq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /3 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbq_ mi_ sxl lock_sbbq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /3 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbq_ mr lock_sbbq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x19 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbw_ mi lock_sbbw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /3 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
sbbw_ mr lock_sbbw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x19 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subb_ mi lock_subb: MI(m8[rw], imm8) => 0xF0 + 0x80 /5 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subb_ mr lock_subb: MR(m8[rw], r8) => 0xF0 + 0x28 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subl_ mi lock_subl: MI(m32[rw], imm32) => 0xF0 + 0x81 /5 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subl_ mi_ sxb lock_subl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /5 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subl_ mr lock_subl: MR(m32[rw], r32) => 0xF0 + 0x29 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subq_ mi_ sxb lock_subq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /5 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subq_ mi_ sxl lock_subq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /5 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subq_ mr lock_subq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x29 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subw_ mi lock_subw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /5 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
subw_ mr lock_subw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x29 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorb_ mi lock_xorb: MI(m8[rw], imm8) => 0xF0 + 0x80 /6 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorb_ mr lock_xorb: MR(m8[rw], r8) => 0xF0 + 0x30 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorl_ mi lock_xorl: MI(m32[rw], imm32) => 0xF0 + 0x81 /6 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorl_ mi_ sxb lock_xorl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /6 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorl_ mr lock_xorl: MR(m32[rw], r32) => 0xF0 + 0x31 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorq_ mi_ sxb lock_xorq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /6 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorq_ mi_ sxl lock_xorq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /6 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorq_ mr lock_xorq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x31 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorw_ mi lock_xorw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /6 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- lock_
xorw_ mr lock_xorw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x31 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orb_i
orb: I(al[rw], imm8) => 0x0c ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orb_mi
orb: MI(rm8[rw], imm8) => 0x80 /1 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orb_mr
orb: MR(rm8[rw], r8) => 0x08 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orb_rm
orb: RM(r8[rw], rm8) => 0x0a /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orl_i
orl: I(eax[rw], imm32) => 0x0d id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orl_mi
orl: MI(rm32[rw], imm32) => 0x81 /1 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orl_
mi_ sxb orl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /1 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orl_mr
orl: MR(rm32[rw], r32) => 0x09 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orl_rm
orl: RM(r32[rw], rm32) => 0x0b /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orpd_a
orpd: A(xmm[rw], rm128[align]) => 0x66 + 0x0F + 0x56 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orps_a
orps: A(xmm[rw], rm128[align]) => 0x0F + 0x56 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orq_
i_ sxl orq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x0d id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orq_
mi_ sxb orq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /1 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orq_
mi_ sxl orq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /1 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orq_mr
orq: MR(rm64[rw], r64) => REX.W + 0x09 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orq_rm
orq: RM(r64[rw], rm64) => REX.W + 0x0b /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orw_i
orw: I(ax[rw], imm16) => 0x66 + 0x0d iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orw_mi
orw: MI(rm16[rw], imm16) => 0x66 + 0x81 /1 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orw_mr
orw: MR(rm16[rw], r16) => 0x66 + 0x09 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- orw_rm
orw: RM(r16[rw], rm16) => 0x66 + 0x0b /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbb_i
sbbb: I(al[rw], imm8) => 0x1c ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbb_mi
sbbb: MI(rm8[rw], imm8) => 0x80 /3 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbb_mr
sbbb: MR(rm8[rw], r8) => 0x18 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbb_rm
sbbb: RM(r8[rw], rm8) => 0x1a /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbl_i
sbbl: I(eax[rw], imm32) => 0x1d id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbl_mi
sbbl: MI(rm32[rw], imm32) => 0x81 /3 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbl_
mi_ sxb sbbl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /3 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbl_mr
sbbl: MR(rm32[rw], r32) => 0x19 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbl_rm
sbbl: RM(r32[rw], rm32) => 0x1b /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbq_
i_ sxl sbbq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x1d id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbq_
mi_ sxb sbbq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /3 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbq_
mi_ sxl sbbq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /3 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbq_mr
sbbq: MR(rm64[rw], r64) => REX.W + 0x19 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbq_rm
sbbq: RM(r64[rw], rm64) => REX.W + 0x1b /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbw_i
sbbw: I(ax[rw], imm16) => 0x66 + 0x1d iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbw_mi
sbbw: MI(rm16[rw], imm16) => 0x66 + 0x81 /3 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbw_mr
sbbw: MR(rm16[rw], r16) => 0x66 + 0x19 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- sbbw_rm
sbbw: RM(r16[rw], rm16) => 0x66 + 0x1b /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- shldl_
mrc shldl: MRC(rm32[rw], r32, cl) => 0x0F + 0xa5 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- shldl_
mri shldl: MRI(rm32[rw], r32, imm8) => 0x0F + 0xa4 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- shldq_
mrc shldq: MRC(rm64[rw], r64, cl) => REX.W + 0x0F + 0xa5 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- shldq_
mri shldq: MRI(rm64[rw], r64, imm8) => REX.W + 0x0F + 0xa4 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- shldw_
mrc shldw: MRC(rm16[rw], r16, cl) => 0x66 + 0x0F + 0xa5 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- shldw_
mri shldw: MRI(rm16[rw], r16, imm8) => 0x66 + 0x0F + 0xa4 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subb_i
subb: I(al[rw], imm8) => 0x2c ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subb_mi
subb: MI(rm8[rw], imm8) => 0x80 /5 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subb_mr
subb: MR(rm8[rw], r8) => 0x28 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subb_rm
subb: RM(r8[rw], rm8) => 0x2a /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subl_i
subl: I(eax[rw], imm32) => 0x2d id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subl_mi
subl: MI(rm32[rw], imm32) => 0x81 /5 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subl_
mi_ sxb subl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /5 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subl_mr
subl: MR(rm32[rw], r32) => 0x29 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subl_rm
subl: RM(r32[rw], rm32) => 0x2b /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subpd_a
subpd: A(xmm[rw], rm128[align]) => 0x66 + 0x0F + 0x5c /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subps_a
subps: A(xmm[rw], rm128[align]) => 0x0F + 0x5c /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subq_
i_ sxl subq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x2d id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subq_
mi_ sxb subq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /5 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subq_
mi_ sxl subq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /5 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subq_mr
subq: MR(rm64[rw], r64) => REX.W + 0x29 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subq_rm
subq: RM(r64[rw], rm64) => REX.W + 0x2b /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subw_i
subw: I(ax[rw], imm16) => 0x66 + 0x2d iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subw_mi
subw: MI(rm16[rw], imm16) => 0x66 + 0x81 /5 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subw_mr
subw: MR(rm16[rw], r16) => 0x66 + 0x29 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- subw_rm
subw: RM(r16[rw], rm16) => 0x66 + 0x2b /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorb_i
xorb: I(al[rw], imm8) => 0x34 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorb_mi
xorb: MI(rm8[rw], imm8) => 0x80 /6 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorb_mr
xorb: MR(rm8[rw], r8) => 0x30 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorb_rm
xorb: RM(r8[rw], rm8) => 0x32 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorl_i
xorl: I(eax[rw], imm32) => 0x35 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorl_mi
xorl: MI(rm32[rw], imm32) => 0x81 /6 id [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorl_
mi_ sxb xorl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /6 ib [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorl_mr
xorl: MR(rm32[rw], r32) => 0x31 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorl_rm
xorl: RM(r32[rw], rm32) => 0x33 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorpd_a
xorpd: A(xmm[rw], rm128[align]) => 0x66 + 0x0F + 0x57 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorps_a
xorps: A(xmm[rw], rm128[align]) => 0x0F + 0x57 /r [_64b | compat | sse]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorq_
i_ sxl xorq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x35 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorq_
mi_ sxb xorq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /6 ib [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorq_
mi_ sxl xorq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /6 id [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorq_mr
xorq: MR(rm64[rw], r64) => REX.W + 0x31 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorq_rm
xorq: RM(r64[rw], rm64) => REX.W + 0x33 /r [_64b]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorw_i
xorw: I(ax[rw], imm16) => 0x66 + 0x35 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorw_mi
xorw: MI(rm16[rw], imm16) => 0x66 + 0x81 /6 iw [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorw_mr
xorw: MR(rm16[rw], r16) => 0x66 + 0x31 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14- xorw_rm
xorw: RM(r16[rw], rm16) => 0x66 + 0x33 /r [_64b | compat]// cranelift/assembler-x64/meta/src/generate/inst.rs:14