Module inst

Expose all known instructions as Rust structs; this is generated in build.rs.

See also: Inst, an enum containing all these instructions.

Structs

adcb_i

adcb: I(al[rw], imm8) => 0x14 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcb_mi

adcb: MI(rm8[rw], imm8) => 0x80 /2 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcb_mr

adcb: MR(rm8[rw], r8) => 0x10 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcb_rm

adcb: RM(r8[rw], rm8) => 0x12 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcl_i

adcl: I(eax[rw], imm32) => 0x15 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcl_mi

adcl: MI(rm32[rw], imm32) => 0x81 /2 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcl_mi_sxb

adcl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /2 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcl_mr

adcl: MR(rm32[rw], r32) => 0x11 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcl_rm

adcl: RM(r32[rw], rm32) => 0x13 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcq_i_sxl

adcq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x15 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcq_mi_sxb

adcq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /2 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcq_mi_sxl

adcq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /2 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcq_mr

adcq: MR(rm64[rw], r64) => REX.W + 0x11 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcq_rm

adcq: RM(r64[rw], rm64) => REX.W + 0x13 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcw_i

adcw: I(ax[rw], imm16) => 0x66 + 0x15 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcw_mi

adcw: MI(rm16[rw], imm16) => 0x66 + 0x81 /2 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcw_mr

adcw: MR(rm16[rw], r16) => 0x66 + 0x11 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

adcw_rm

adcw: RM(r16[rw], rm16) => 0x66 + 0x13 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addb_i

addb: I(al[rw], imm8) => 0x04 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addb_mi

addb: MI(rm8[rw], imm8) => 0x80 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addb_mr

addb: MR(rm8[rw], r8) => 0x00 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addb_rm

addb: RM(r8[rw], rm8) => 0x02 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addl_i

addl: I(eax[rw], imm32) => 0x05 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addl_mi

addl: MI(rm32[rw], imm32) => 0x81 /0 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addl_mi_sxb

addl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addl_mr

addl: MR(rm32[rw], r32) => 0x01 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addl_rm

addl: RM(r32[rw], rm32) => 0x03 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addpd_a

addpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x58 /r [_64b | compat | sse2] (alternate: avx => vaddpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addps_a

addps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x58 /r [_64b | compat | sse] (alternate: avx => vaddps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addq_i_sxl

addq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x05 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addq_mi_sxb

addq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /0 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addq_mi_sxl

addq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /0 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addq_mr

addq: MR(rm64[rw], r64) => REX.W + 0x01 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addq_rm

addq: RM(r64[rw], rm64) => REX.W + 0x03 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addsd_a

addsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x58 /r [_64b | compat | sse2] (alternate: avx => vaddsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addss_a

addss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x58 /r [_64b | compat | sse] (alternate: avx => vaddss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addw_i

addw: I(ax[rw], imm16) => 0x66 + 0x05 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addw_mi

addw: MI(rm16[rw], imm16) => 0x66 + 0x81 /0 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addw_mr

addw: MR(rm16[rw], r16) => 0x66 + 0x01 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

addw_rm

addw: RM(r16[rw], rm16) => 0x66 + 0x03 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andb_i

andb: I(al[rw], imm8) => 0x24 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andb_mi

andb: MI(rm8[rw], imm8) => 0x80 /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andb_mr

andb: MR(rm8[rw], r8) => 0x20 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andb_rm

andb: RM(r8[rw], rm8) => 0x22 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andl_i

andl: I(eax[rw], imm32) => 0x25 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andl_mi

andl: MI(rm32[rw], imm32) => 0x81 /4 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andl_mi_sxb

andl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andl_mr

andl: MR(rm32[rw], r32) => 0x21 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andl_rm

andl: RM(r32[rw], rm32) => 0x23 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andnl_rvm

andnl: RVM(r32a[w], r32b, rm32) => VEX.LZ.0F38.W0 0xF2 [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andnpd_a

andnpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x55 /r [_64b | compat | sse2] (alternate: avx => vandnpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andnps_a

andnps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x55 /r [_64b | compat | sse] (alternate: avx => vandnps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andnq_rvm

andnq: RVM(r64a[w], r64b, rm64) => VEX.LZ.0F38.W1 0xF2 [_64b | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andpd_a

andpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x54 /r [_64b | compat | sse2] (alternate: avx => vandpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andps_a

andps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x54 /r [_64b | compat | sse] (alternate: avx => vandps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andq_i_sxl

andq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x25 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andq_mi_sxb

andq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /4 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andq_mi_sxl

andq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /4 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andq_mr

andq: MR(rm64[rw], r64) => REX.W + 0x21 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andq_rm

andq: RM(r64[rw], rm64) => REX.W + 0x23 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andw_i

andw: I(ax[rw], imm16) => 0x66 + 0x25 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andw_mi

andw: MI(rm16[rw], imm16) => 0x66 + 0x81 /4 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andw_mr

andw: MR(rm16[rw], r16) => 0x66 + 0x21 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

andw_rm

andw: RM(r16[rw], rm16) => 0x66 + 0x23 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blendvpd_rm0

blendvpd: RM0(xmm1[rw], xmm_m128[align], xmm0) => 0x66 + 0x0F + 0x38 0x15 /r [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blendvps_rm0

blendvps: RM0(xmm1[rw], xmm_m128[align], xmm0) => 0x66 + 0x0F + 0x38 0x14 /r [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blsil_vm

blsil: VM(r32[w], rm32) => VEX.LZ.0F38.W0 0xF3 /3 [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blsiq_vm

blsiq: VM(r64[w], rm64) => VEX.LZ.0F38.W1 0xF3 /3 [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blsmskl_vm

blsmskl: VM(r32[w], rm32) => VEX.LZ.0F38.W0 0xF3 /2 [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blsmskq_vm

blsmskq: VM(r64[w], rm64) => VEX.LZ.0F38.W1 0xF3 /2 [_64b | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blsrl_vm

blsrl: VM(r32[w], rm32) => VEX.LZ.0F38.W0 0xF3 /1 [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

blsrq_vm

blsrq: VM(r64[w], rm64) => VEX.LZ.0F38.W1 0xF3 /1 [_64b | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bsfl_rm

bsfl: RM(r32[w], rm32) => 0x0F + 0xBC /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bsfq_rm

bsfq: RM(r64[w], rm64) => REX.W + 0x0F + 0xBC /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bsfw_rm

bsfw: RM(r16[w], rm16) => 0x66 + 0x0F + 0xBC /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bsrl_rm

bsrl: RM(r32[w], rm32) => 0x0F + 0xBD /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bsrq_rm

bsrq: RM(r64[w], rm64) => REX.W + 0x0F + 0xBD /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bsrw_rm

bsrw: RM(r16[w], rm16) => 0x66 + 0x0F + 0xBD /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bswapl_o

bswapl: O(r32[rw]) => 0x0F + 0xC8 +rd [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bswapq_o

bswapq: O(r64[rw]) => REX.W + 0x0F + 0xC8 +ro [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

btl_mi

btl: MI(rm32, imm8)[flags:w] => 0x0F + 0xBA /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

btl_mr

btl: MR(rm32, r32)[flags:w] => 0x0F + 0xA3 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

btq_mi

btq: MI(rm64, imm8)[flags:w] => REX.W + 0x0F + 0xBA /4 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

btq_mr

btq: MR(rm64, r64)[flags:w] => REX.W + 0x0F + 0xA3 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

btw_mi

btw: MI(rm16, imm8)[flags:w] => 0x66 + 0x0F + 0xBA /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

btw_mr

btw: MR(rm16, r16)[flags:w] => 0x66 + 0x0F + 0xA3 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bzhil_rmv

bzhil: RMV(r32a[w], rm32, r32b) => VEX.LZ.0F38.W0 0xF5 [_64b | compat | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

bzhiq_rmv

bzhiq: RMV(r64a[w], rm64, r64b) => VEX.LZ.0F38.W1 0xF5 [_64b | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

callq_d

callq: D(imm32[sxl]) => 0xE8 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

callq_m

callq: M(rm64) => 0xFF /2 [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cbtw_zo

cbtw: ZO(ax[rw,implicit]) => 0x66 + 0x98 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cltd_zo

cltd: ZO(edx[w,implicit], eax[implicit]) => 0x99 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cltq_zo

cltq: ZO(rax[rw,implicit]) => REX.W + 0x98 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovael_rm

cmovael: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x43 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovaeq_rm

cmovaeq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x43 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovaew_rm

cmovaew: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x43 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmoval_rm

cmoval: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x47 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovaq_rm

cmovaq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x47 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovaw_rm

cmovaw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x47 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovbel_rm

cmovbel: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x46 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovbeq_rm

cmovbeq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x46 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovbew_rm

cmovbew: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x46 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovbl_rm

cmovbl: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x42 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovbq_rm

cmovbq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x42 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovbw_rm

cmovbw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x42 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovel_rm

cmovel: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x44 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmoveq_rm

cmoveq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x44 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovew_rm

cmovew: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x44 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovgel_rm

cmovgel: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x4D /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovgeq_rm

cmovgeq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x4D /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovgew_rm

cmovgew: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x4D /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovgl_rm

cmovgl: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x4F /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovgq_rm

cmovgq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x4F /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovgw_rm

cmovgw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x4F /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovlel_rm

cmovlel: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x4E /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovleq_rm

cmovleq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x4E /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovlew_rm

cmovlew: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x4E /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovll_rm

cmovll: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x4C /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovlq_rm

cmovlq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x4C /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovlw_rm

cmovlw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x4C /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnel_rm

cmovnel: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x45 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovneq_rm

cmovneq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x45 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnew_rm

cmovnew: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x45 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnol_rm

cmovnol: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x41 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnoq_rm

cmovnoq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x41 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnow_rm

cmovnow: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x41 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnpl_rm

cmovnpl: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x4B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnpq_rm

cmovnpq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x4B /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnpw_rm

cmovnpw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x4B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnsl_rm

cmovnsl: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x49 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnsq_rm

cmovnsq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x49 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovnsw_rm

cmovnsw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x49 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovol_rm

cmovol: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x40 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovoq_rm

cmovoq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x40 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovow_rm

cmovow: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x40 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovpl_rm

cmovpl: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x4A /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovpq_rm

cmovpq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x4A /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovpw_rm

cmovpw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x4A /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovsl_rm

cmovsl: RM(r32[rw], rm32)[flags:r] => 0x0F + 0x48 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovsq_rm

cmovsq: RM(r64[rw], rm64)[flags:r] => REX.W + 0x0F + 0x48 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmovsw_rm

cmovsw: RM(r16[rw], rm16)[flags:r] => 0x66 + 0x0F + 0x48 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpb_i

cmpb: I(al, imm8)[flags:w] => 0x3C ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpb_mi

cmpb: MI(rm8, imm8)[flags:w] => 0x80 /7 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpb_mr

cmpb: MR(rm8, r8)[flags:w] => 0x38 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpb_rm

cmpb: RM(r8, rm8)[flags:w] => 0x3A [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpl_i

cmpl: I(eax, imm32)[flags:w] => 0x3D id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpl_mi

cmpl: MI(rm32, imm32)[flags:w] => 0x81 /7 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpl_mi_sxb

cmpl: MI_SXB(rm32, imm8[sxl])[flags:w] => 0x83 /7 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpl_mr

cmpl: MR(rm32, r32)[flags:w] => 0x39 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpl_rm

cmpl: RM(r32, rm32)[flags:w] => 0x3B [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmppd_a

cmppd: A(xmm1[rw], xmm_m128, imm8) => 0x66 + 0x0F + 0xC2 /r ib [_64b | compat | sse2] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpps_a

cmpps: A(xmm1[rw], xmm_m128, imm8) => 0x0F + 0xC2 /r ib [_64b | compat | sse] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpq_i

cmpq: I(rax, imm32[sxq])[flags:w] => REX.W + 0x3D id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpq_mi

cmpq: MI(rm64, imm32[sxq])[flags:w] => REX.W + 0x81 /7 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpq_mi_sxb

cmpq: MI_SXB(rm64, imm8[sxq])[flags:w] => REX.W + 0x83 /7 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpq_mr

cmpq: MR(rm64, r64)[flags:w] => REX.W + 0x39 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpq_rm

cmpq: RM(r64, rm64)[flags:w] => REX.W + 0x3B [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpsd_a

cmpsd: A(xmm1[rw], xmm_m64, imm8) => 0xF2 + 0x0F + 0xC2 /r ib [_64b | compat | sse2] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpss_a

cmpss: A(xmm1[rw], xmm_m32, imm8) => 0xF3 + 0x0F + 0xC2 /r ib [_64b | compat | sse] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpw_i

cmpw: I(ax, imm16)[flags:w] => 0x66 + 0x3D iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpw_mi

cmpw: MI(rm16, imm16)[flags:w] => 0x66 + 0x81 /7 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpw_mi_sxb

cmpw: MI_SXB(rm16, imm8[sxw])[flags:w] => 0x66 + 0x83 /7 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpw_mr

cmpw: MR(rm16, r16)[flags:w] => 0x66 + 0x39 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpw_rm

cmpw: RM(r16, rm16)[flags:w] => 0x66 + 0x3B [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpxchg16b_m

cmpxchg16b: M(rax[rw,implicit], rdx[rw,implicit], rbx[implicit], rcx[implicit], m128[rw]) => REX.W + 0x0F + 0xC7 /1 [_64b | cmpxchg16b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpxchgb_mr

cmpxchgb: MR(rm8[rw], r8, al[rw,implicit]) => 0x0F + 0xB0 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpxchgl_mr

cmpxchgl: MR(rm32[rw], r32, eax[rw,implicit]) => 0x0F + 0xB1 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpxchgq_mr

cmpxchgq: MR(rm64[rw], r64, rax[rw,implicit]) => REX.W + 0x0F + 0xB1 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cmpxchgw_mr

cmpxchgw: MR(rm16[rw], r16, ax[rw,implicit]) => 0x66 + 0x0F + 0xB1 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cqto_zo

cqto: ZO(rdx[w,implicit], rax[implicit]) => REX.W + 0x99 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtdq2pd_a

cvtdq2pd: A(xmm1[w], xmm_m64) => 0xF3 + 0x0F + 0xE6 /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtdq2ps_a

cvtdq2ps: A(xmm1[w], xmm_m128[align]) => 0x0F + 0x5B /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtpd2ps_a

cvtpd2ps: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x5A /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtps2pd_a

cvtps2pd: A(xmm1[w], xmm_m64) => 0x0F + 0x5A /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsd2si_a

cvtsd2si: A(r32[w], xmm_m64) => 0xF2 + 0x0F + 0x2D /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsd2si_aq

cvtsd2si: AQ(r64[w], xmm_m64) => 0xF2 + REX.W + 0x0F + 0x2D /r [_64b | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsd2ss_a

cvtsd2ss: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x5A /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsi2sdl_a

cvtsi2sdl: A(xmm1[rw], rm32) => 0xF2 + 0x0F + 0x2A /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsi2sdq_a

cvtsi2sdq: A(xmm1[rw], rm64) => 0xF2 + REX.W + 0x0F + 0x2A /r [_64b | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsi2ssl_a

cvtsi2ssl: A(xmm1[rw], rm32) => 0xF3 + 0x0F + 0x2A /r [_64b | compat | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtsi2ssq_a

cvtsi2ssq: A(xmm1[rw], rm64) => 0xF3 + REX.W + 0x0F + 0x2A /r [_64b | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtss2sd_a

cvtss2sd: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x5A /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtss2si_a

cvtss2si: A(r32[w], xmm_m32) => 0xF3 + 0x0F + 0x2D /r [_64b | compat | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvtss2si_aq

cvtss2si: AQ(r64[w], xmm_m32) => 0xF3 + REX.W + 0x0F + 0x2D /r [_64b | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvttpd2dq_a

cvttpd2dq: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0xE6 /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvttps2dq_a

cvttps2dq: A(xmm1[w], xmm_m128[align]) => 0xF3 + 0x0F + 0x5B /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvttsd2si_a

cvttsd2si: A(r32[w], xmm_m64) => 0xF2 + 0x0F + 0x2C /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvttsd2si_aq

cvttsd2si: AQ(r64[w], xmm_m64) => 0xF2 + REX.W + 0x0F + 0x2C /r [_64b | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvttss2si_a

cvttss2si: A(r32[w], xmm_m32) => 0xF3 + 0x0F + 0x2C /r [_64b | compat | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cvttss2si_aq

cvttss2si: AQ(r64[w], xmm_m32) => 0xF3 + REX.W + 0x0F + 0x2C /r [_64b | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cwtd_zo

cwtd: ZO(dx[w,implicit], ax[implicit]) => 0x66 + 0x99 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

cwtl_zo

cwtl: ZO(eax[rw,implicit]) => 0x98 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divb_m

divb: M(ax[rw,implicit], rm8) => 0xF6 /6 [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divl_m

divl: M(eax[rw,implicit], edx[rw,implicit], rm32) => 0xF7 /6 [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divpd_a

divpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x5E /r [_64b | compat | sse2] (alternate: avx => vdivpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divps_a

divps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x5E /r [_64b | compat | sse] (alternate: avx => vdivps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divq_m

divq: M(rax[rw,implicit], rdx[rw,implicit], rm64) => REX.W + 0xF7 /6 [_64b] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divsd_a

divsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x5E /r [_64b | compat | sse2] (alternate: avx => vdivsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divss_a

divss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x5E /r [_64b | compat | sse] (alternate: avx => vdivss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

divw_m

divw: M(ax[rw,implicit], dx[rw,implicit], rm16) => 0x66 + 0xF7 /6 [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

extractps_a

extractps: A(rm32[w], xmm1, imm8) => 0x66 + 0x0F + 0x3A 0x17 /r ib [_64b | compat | sse41] (alternate: avx => vextractps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

hlt_zo

hlt: ZO() => 0xF4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

idivb_m

idivb: M(ax[rw,implicit], rm8) => 0xF6 /7 [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

idivl_m

idivl: M(eax[rw,implicit], edx[rw,implicit], rm32) => 0xF7 /7 [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

idivq_m

idivq: M(rax[rw,implicit], rdx[rw,implicit], rm64) => REX.W + 0xF7 /7 [_64b] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

idivw_m

idivw: M(ax[rw,implicit], dx[rw,implicit], rm16) => 0x66 + 0xF7 /7 [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulb_m

imulb: M(ax[rw,implicit], rm8) => 0xF6 /5 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imull_m

imull: M(eax[rw,implicit], edx[w,implicit], rm32) => 0xF7 /5 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imull_rm

imull: RM(r32[rw], rm32) => 0x0F + 0xAF [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imull_rmi

imull: RMI(r32[w], rm32, imm32) => 0x69 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imull_rmi_sxb

imull: RMI_SXB(r32[w], rm32, imm8[sxl]) => 0x6B ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulq_m

imulq: M(rax[rw,implicit], rdx[w,implicit], rm64) => REX.W + 0xF7 /5 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulq_rm

imulq: RM(r64[rw], rm64) => REX.W + 0x0F + 0xAF [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulq_rmi_sxb

imulq: RMI_SXB(r64[w], rm64, imm8[sxq]) => REX.W + 0x6B ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulq_rmi_sxl

imulq: RMI_SXL(r64[w], rm64, imm32[sxq]) => REX.W + 0x69 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulw_m

imulw: M(ax[rw,implicit], dx[w,implicit], rm16) => 0x66 + 0xF7 /5 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulw_rm

imulw: RM(r16[rw], rm16) => 0x66 + 0x0F + 0xAF [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulw_rmi

imulw: RMI(r16[w], rm16, imm16) => 0x66 + 0x69 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

imulw_rmi_sxb

imulw: RMI_SXB(r16[w], rm16, imm8[sxw]) => 0x66 + 0x6B ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

insertps_a

insertps: A(xmm1[rw], xmm_m32, imm8) => 0x66 + 0x0F + 0x3A 0x21 /r ib [_64b | compat | sse41] (alternate: avx => vinsertps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

int3_zo

int3: ZO() => 0xCC [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

ja_d8

ja: D8(imm8[sxq]) => 0x77 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

ja_d32

ja: D32(imm32[sxq]) => 0x0F + 0x87 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jae_d8

jae: D8(imm8[sxq]) => 0x73 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jae_d32

jae: D32(imm32[sxq]) => 0x0F + 0x83 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jb_d8

jb: D8(imm8[sxq]) => 0x72 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jb_d32

jb: D32(imm32[sxq]) => 0x0F + 0x82 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jbe_d8

jbe: D8(imm8[sxq]) => 0x76 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jbe_d32

jbe: D32(imm32[sxq]) => 0x0F + 0x86 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

je_d8

je: D8(imm8[sxq]) => 0x74 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

je_d32

je: D32(imm32[sxq]) => 0x0F + 0x84 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jg_d8

jg: D8(imm8[sxq]) => 0x7F ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jg_d32

jg: D32(imm32[sxq]) => 0x0F + 0x8F id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jge_d8

jge: D8(imm8[sxq]) => 0x7D ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jge_d32

jge: D32(imm32[sxq]) => 0x0F + 0x8D id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jl_d8

jl: D8(imm8[sxq]) => 0x7C ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jl_d32

jl: D32(imm32[sxq]) => 0x0F + 0x8C id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jle_d8

jle: D8(imm8[sxq]) => 0x7E ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jle_d32

jle: D32(imm32[sxq]) => 0x0F + 0x8E id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jmp_d8

jmp: D8(imm8[sxq]) => 0xEB ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jmp_d32

jmp: D32(imm32[sxq]) => 0xE9 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jmpq_m

jmpq: M(rm64) => 0xFF /4 [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jne_d8

jne: D8(imm8[sxq]) => 0x75 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jne_d32

jne: D32(imm32[sxq]) => 0x0F + 0x85 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jno_d8

jno: D8(imm8[sxq]) => 0x71 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jno_d32

jno: D32(imm32[sxq]) => 0x0F + 0x81 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jnp_d8

jnp: D8(imm8[sxq]) => 0x7B ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jnp_d32

jnp: D32(imm32[sxq]) => 0x0F + 0x8B id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jns_d8

jns: D8(imm8[sxq]) => 0x79 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jns_d32

jns: D32(imm32[sxq]) => 0x0F + 0x89 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jo_d8

jo: D8(imm8[sxq]) => 0x70 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jo_d32

jo: D32(imm32[sxq]) => 0x0F + 0x80 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jp_d8

jp: D8(imm8[sxq]) => 0x7A ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

jp_d32

jp: D32(imm32[sxq]) => 0x0F + 0x8A id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

js_d8

js: D8(imm8[sxq]) => 0x78 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

js_d32

js: D32(imm32[sxq]) => 0x0F + 0x88 id [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

leal_rm

leal: RM(r32[w], m32) => 0x8D /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

leaq_rm

leaq: RM(r64[w], m64) => REX.W + 0x8D /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

leaw_rm

leaw: RM(r16[w], m16) => 0x66 + 0x8D /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lfence_zo

lfence: ZO() => 0x0F + 0xAE 0xE8 [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcb_mi

lock_adcb: MI(m8[rw], imm8) => 0xF0 + 0x80 /2 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcb_mr

lock_adcb: MR(m8[rw], r8) => 0xF0 + 0x10 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcl_mi

lock_adcl: MI(m32[rw], imm32) => 0xF0 + 0x81 /2 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcl_mi_sxb

lock_adcl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /2 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcl_mr

lock_adcl: MR(m32[rw], r32) => 0xF0 + 0x11 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcq_mi_sxb

lock_adcq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /2 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcq_mi_sxl

lock_adcq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /2 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcq_mr

lock_adcq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x11 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcw_mi

lock_adcw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /2 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_adcw_mr

lock_adcw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x11 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addb_mi

lock_addb: MI(m8[rw], imm8) => 0xF0 + 0x80 /0 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addb_mr

lock_addb: MR(m8[rw], r8) => 0xF0 + 0x00 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addl_mi

lock_addl: MI(m32[rw], imm32) => 0xF0 + 0x81 /0 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addl_mi_sxb

lock_addl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /0 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addl_mr

lock_addl: MR(m32[rw], r32) => 0xF0 + 0x01 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addq_mi_sxb

lock_addq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /0 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addq_mi_sxl

lock_addq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /0 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addq_mr

lock_addq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x01 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addw_mi

lock_addw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /0 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_addw_mr

lock_addw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x01 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andb_mi

lock_andb: MI(m8[rw], imm8) => 0xF0 + 0x80 /4 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andb_mr

lock_andb: MR(m8[rw], r8) => 0xF0 + 0x20 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andl_mi

lock_andl: MI(m32[rw], imm32) => 0xF0 + 0x81 /4 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andl_mi_sxb

lock_andl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /4 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andl_mr

lock_andl: MR(m32[rw], r32) => 0xF0 + 0x21 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andq_mi_sxb

lock_andq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /4 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andq_mi_sxl

lock_andq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /4 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andq_mr

lock_andq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x21 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andw_mi

lock_andw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /4 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_andw_mr

lock_andw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x21 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_cmpxchg16b_m

lock_cmpxchg16b: M(rax[rw,implicit], rdx[rw,implicit], rbx[implicit], rcx[implicit], m128[rw]) => 0xF0 + REX.W + 0x0F + 0xC7 /1 [_64b | cmpxchg16b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_cmpxchgb_mr

lock_cmpxchgb: MR(m8[rw], r8, al[rw,implicit]) => 0xF0 + 0x0F + 0xB0 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_cmpxchgl_mr

lock_cmpxchgl: MR(m32[rw], r32, eax[rw,implicit]) => 0xF0 + 0x0F + 0xB1 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_cmpxchgq_mr

lock_cmpxchgq: MR(m64[rw], r64, rax[rw,implicit]) => 0xF0 + REX.W + 0x0F + 0xB1 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_cmpxchgw_mr

lock_cmpxchgw: MR(m16[rw], r16, ax[rw,implicit]) => 0xF0 + 0x66 + 0x0F + 0xB1 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orb_mi

lock_orb: MI(m8[rw], imm8) => 0xF0 + 0x80 /1 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orb_mr

lock_orb: MR(m8[rw], r8) => 0xF0 + 0x08 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orl_mi

lock_orl: MI(m32[rw], imm32) => 0xF0 + 0x81 /1 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orl_mi_sxb

lock_orl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /1 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orl_mr

lock_orl: MR(m32[rw], r32) => 0xF0 + 0x09 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orq_mi_sxb

lock_orq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /1 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orq_mi_sxl

lock_orq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /1 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orq_mr

lock_orq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x09 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orw_mi

lock_orw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /1 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_orw_mr

lock_orw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x09 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbb_mi

lock_sbbb: MI(m8[rw], imm8) => 0xF0 + 0x80 /3 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbb_mr

lock_sbbb: MR(m8[rw], r8) => 0xF0 + 0x18 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbl_mi

lock_sbbl: MI(m32[rw], imm32) => 0xF0 + 0x81 /3 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbl_mi_sxb

lock_sbbl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /3 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbl_mr

lock_sbbl: MR(m32[rw], r32) => 0xF0 + 0x19 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbq_mi_sxb

lock_sbbq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /3 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbq_mi_sxl

lock_sbbq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /3 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbq_mr

lock_sbbq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x19 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbw_mi

lock_sbbw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /3 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_sbbw_mr

lock_sbbw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x19 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subb_mi

lock_subb: MI(m8[rw], imm8) => 0xF0 + 0x80 /5 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subb_mr

lock_subb: MR(m8[rw], r8) => 0xF0 + 0x28 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subl_mi

lock_subl: MI(m32[rw], imm32) => 0xF0 + 0x81 /5 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subl_mi_sxb

lock_subl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /5 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subl_mr

lock_subl: MR(m32[rw], r32) => 0xF0 + 0x29 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subq_mi_sxb

lock_subq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /5 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subq_mi_sxl

lock_subq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /5 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subq_mr

lock_subq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x29 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subw_mi

lock_subw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /5 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_subw_mr

lock_subw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x29 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xaddb_mr

lock_xaddb: MR(m8[rw], r8[rw]) => 0xF0 + 0x0F + 0xC0 /r [_64b | compat] custom(Mnemonic | Visit) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xaddl_mr

lock_xaddl: MR(m32[rw], r32[rw]) => 0xF0 + 0x0F + 0xC1 /r [_64b | compat] custom(Mnemonic | Visit) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xaddq_mr

lock_xaddq: MR(m64[rw], r64[rw]) => 0xF0 + REX.W + 0x0F + 0xC1 /r [_64b] custom(Mnemonic | Visit) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xaddw_mr

lock_xaddw: MR(m16[rw], r16[rw]) => 0xF0 + 0x66 + 0x0F + 0xC1 /r [_64b | compat] custom(Mnemonic | Visit) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorb_mi

lock_xorb: MI(m8[rw], imm8) => 0xF0 + 0x80 /6 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorb_mr

lock_xorb: MR(m8[rw], r8) => 0xF0 + 0x30 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorl_mi

lock_xorl: MI(m32[rw], imm32) => 0xF0 + 0x81 /6 id [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorl_mi_sxb

lock_xorl: MI_SXB(m32[rw], imm8[sxl]) => 0xF0 + 0x83 /6 ib [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorl_mr

lock_xorl: MR(m32[rw], r32) => 0xF0 + 0x31 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorq_mi_sxb

lock_xorq: MI_SXB(m64[rw], imm8[sxq]) => 0xF0 + REX.W + 0x83 /6 ib [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorq_mi_sxl

lock_xorq: MI_SXL(m64[rw], imm32[sxq]) => 0xF0 + REX.W + 0x81 /6 id [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorq_mr

lock_xorq: MR(m64[rw], r64) => 0xF0 + REX.W + 0x31 /r [_64b] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorw_mi

lock_xorw: MI(m16[rw], imm16) => 0xF0 + 0x66 + 0x81 /6 iw [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lock_xorw_mr

lock_xorw: MR(m16[rw], r16) => 0xF0 + 0x66 + 0x31 /r [_64b | compat] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lzcntl_rm

lzcntl: RM(r32[w], rm32) => 0xF3 + 0x0F + 0xBD /r [_64b | compat | lzcnt] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lzcntq_rm

lzcntq: RM(r64[w], rm64) => 0xF3 + REX.W + 0x0F + 0xBD /r [_64b | lzcnt] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

lzcntw_rm

lzcntw: RM(r16[w], rm16) => 0xF3 + 0x66 + 0x0F + 0xBD /r [_64b | compat | lzcnt] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

maxpd_a

maxpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x5F /r [_64b | compat | sse2] (alternate: avx => vmaxpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

maxps_a

maxps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x5F /r [_64b | compat | sse] (alternate: avx => vmaxps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

maxsd_a

maxsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x5F /r [_64b | compat | sse2] (alternate: avx => vmaxsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

maxss_a

maxss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x5F /r [_64b | compat | sse] (alternate: avx => vmaxss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mfence_zo

mfence: ZO() => 0x0F + 0xAE 0xF0 [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

minpd_a

minpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x5D /r [_64b | compat | sse2] (alternate: avx => vminpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

minps_a

minps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x5D /r [_64b | compat | sse] (alternate: avx => vminps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

minsd_a

minsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x5D /r [_64b | compat | sse2] (alternate: avx => vminsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

minss_a

minss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x5D /r [_64b | compat | sse] (alternate: avx => vminss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movabsq_oi

movabsq: OI(r64[w], imm64) => REX.W + 0xB8 +ro io [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movapd_a

movapd: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x28 /r [compat | _64b | sse2] (alternate: avx => vmovapd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movapd_b

movapd: B(xmm_m128[w,align], xmm1) => 0x66 + 0x0F + 0x29 /r [compat | _64b | sse2] (alternate: avx => vmovapd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movaps_a

movaps: A(xmm1[w], xmm_m128[align]) => 0x0F + 0x28 /r [compat | _64b | sse] (alternate: avx => vmovaps_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movaps_b

movaps: B(xmm_m128[w,align], xmm1) => 0x0F + 0x29 /r [compat | _64b | sse] (alternate: avx => vmovaps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movb_mi

movb: MI(rm8[w], imm8) => 0xC6 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movb_mr

movb: MR(rm8[w], r8) => 0x88 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movb_oi

movb: OI(r8[w], imm8) => 0xB0 +rb ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movb_rm

movb: RM(r8[w], rm8) => 0x8A /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movd_a

movd: A(xmm1[w], rm32) => 0x66 + 0x0F + 0x6E /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movd_b

movd: B(rm32[w], xmm2) => 0x66 + 0x0F + 0x7E /r [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movddup_a

movddup: A(xmm1[w], xmm_m64) => 0xF2 + 0x0F + 0x12 /r [_64b | compat | sse3] (alternate: avx => vmovddup_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movdqa_a

movdqa: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x6F /r [compat | _64b | sse2] (alternate: avx => vmovdqa_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movdqa_b

movdqa: B(xmm_m128[w,align], xmm1) => 0x66 + 0x0F + 0x7F /r [compat | _64b | sse2] (alternate: avx => vmovdqa_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movdqu_a

movdqu: A(xmm1[w], xmm_m128) => 0xF3 + 0x0F + 0x6F /r [compat | _64b | sse2] (alternate: avx => vmovdqu_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movdqu_b

movdqu: B(xmm_m128[w], xmm1) => 0xF3 + 0x0F + 0x7F /r [compat | _64b | sse2] (alternate: avx => vmovdqu_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movhps_a

movhps: A(xmm1[rw], m64) => 0x0F + 0x16 /r [_64b | compat | sse] (alternate: avx => vmovhps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movl_mi

movl: MI(rm32[w], imm32) => 0xC7 /0 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movl_mr

movl: MR(rm32[w], r32) => 0x89 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movl_oi

movl: OI(r32[w], imm32) => 0xB8 +rd id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movl_rm

movl: RM(r32[w], rm32) => 0x8B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movlhps_rm

movlhps: RM(xmm1[rw], xmm2) => 0x0F + 0x16 /r [_64b | compat | sse] (alternate: avx => vmovlhps_rvm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movmskpd_rm

movmskpd: RM(r32[w], xmm2) => 0x66 + 0x0F + 0x50 /r [_64b | compat | sse2] (alternate: avx => vmovmskpd_rm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movmskps_rm

movmskps: RM(r32[w], xmm2) => 0x0F + 0x50 /r [_64b | compat | sse] (alternate: avx => vmovmskps_rm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movq_a

movq: A(xmm1[w], rm64) => 0x66 + REX.W + 0x0F + 0x6E /r [_64b | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movq_b

movq: B(rm64[w], xmm2) => 0x66 + REX.W + 0x0F + 0x7E /r [_64b | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movq_mi_sxl

movq: MI_SXL(rm64[w], imm32[sxq]) => REX.W + 0xC7 /0 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movq_mr

movq: MR(rm64[w], r64) => REX.W + 0x89 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movq_rm

movq: RM(r64[w], rm64) => REX.W + 0x8B /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsbl_rm

movsbl: RM(r32[w], rm8[sxl]) => 0x0F + 0xBE /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsbq_rm

movsbq: RM(r64[w], rm8[sxq]) => REX.W + 0x0F + 0xBE /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsbw_rm

movsbw: RM(r16[w], rm8[sxw]) => 0x66 + 0x0F + 0xBE /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsd_a_m

movsd: A_M(xmm1[w], m64) => 0xF2 + 0x0F + 0x10 /r [compat | _64b | sse2] (alternate: avx => vmovsd_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsd_a_r

movsd: A_R(xmm1[rw], xmm2) => 0xF2 + 0x0F + 0x10 /r [compat | _64b | sse2] (alternate: avx => vmovsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsd_c_m

movsd: C_M(m64[w], xmm1) => 0xF2 + 0x0F + 0x11 /r [compat | _64b | sse2] (alternate: avx => vmovsd_c_m) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movslq_rm

movslq: RM(r64[w], rm32[sxl]) => REX.W + 0x63 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movss_a_m

movss: A_M(xmm1[w], m32) => 0xF3 + 0x0F + 0x10 /r [compat | _64b | sse] (alternate: avx => vmovss_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movss_a_r

movss: A_R(xmm1[rw], xmm2) => 0xF3 + 0x0F + 0x10 /r [compat | _64b | sse] (alternate: avx => vmovss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movss_c_m

movss: C_M(m32[w], xmm1) => 0xF3 + 0x0F + 0x11 /r [compat | _64b | sse] (alternate: avx => vmovss_c_m) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movswl_rm

movswl: RM(r32[w], rm16[sxl]) => 0x0F + 0xBF /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movswq_rm

movswq: RM(r64[w], rm16[sxq]) => REX.W + 0x0F + 0xBF /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movsww_rm

movsww: RM(r16[w], rm16[sxl]) => 0x66 + 0x0F + 0xBF /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movupd_a

movupd: A(xmm1[w], xmm_m128) => 0x66 + 0x0F + 0x10 /r [compat | _64b | sse2] (alternate: avx => vmovupd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movupd_b

movupd: B(xmm_m128[w], xmm1) => 0x66 + 0x0F + 0x11 /r [compat | _64b | sse2] (alternate: avx => vmovupd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movups_a

movups: A(xmm1[w], xmm_m128) => 0x0F + 0x10 /r [compat | _64b | sse] (alternate: avx => vmovups_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movups_b

movups: B(xmm_m128[w], xmm1) => 0x0F + 0x11 /r [compat | _64b | sse] (alternate: avx => vmovups_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movw_mi

movw: MI(rm16[w], imm16) => 0x66 + 0xC7 /0 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movw_mr

movw: MR(rm16[w], r16) => 0x66 + 0x89 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movw_oi

movw: OI(r16[w], imm16) => 0x66 + 0xB8 +rw iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movw_rm

movw: RM(r16[w], rm16) => 0x66 + 0x8B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movzbl_rm

movzbl: RM(r32[w], rm8[sxl]) => 0x0F + 0xB6 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movzbq_rm

movzbq: RM(r64[w], rm8[sxq]) => REX.W + 0x0F + 0xB6 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movzbw_rm

movzbw: RM(r16[w], rm8[sxw]) => 0x66 + 0x0F + 0xB6 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movzwl_rm

movzwl: RM(r32[w], rm16[sxl]) => 0x0F + 0xB7 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movzwq_rm

movzwq: RM(r64[w], rm16[sxq]) => REX.W + 0x0F + 0xB7 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

movzww_rm

movzww: RM(r16[w], rm16[sxl]) => 0x66 + 0x0F + 0xB7 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulb_m

mulb: M(ax[rw,implicit], rm8) => 0xF6 /4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mull_m

mull: M(eax[rw,implicit], edx[w,implicit], rm32) => 0xF7 /4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulpd_a

mulpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x59 /r [_64b | compat | sse2] (alternate: avx => vmulpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulps_a

mulps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x59 /r [_64b | compat | sse] (alternate: avx => vmulps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulq_m

mulq: M(rax[rw,implicit], rdx[w,implicit], rm64) => REX.W + 0xF7 /4 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulsd_a

mulsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x59 /r [_64b | compat | sse2] (alternate: avx => vmulsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulss_a

mulss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x59 /r [_64b | compat | sse] (alternate: avx => vmulss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulw_m

mulw: M(ax[rw,implicit], dx[w,implicit], rm16) => 0x66 + 0xF7 /4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulxl_rvm

mulxl: RVM(r32a[w], r32b[w], rm32, edx[implicit]) => VEX.LZ.F2.0F38.W0 0xF6 [_64b | compat | bmi2] custom(Visit) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

mulxq_rvm

mulxq: RVM(r64a[w], r64b[w], rm64, rdx[implicit]) => VEX.LZ.F2.0F38.W1 0xF6 [_64b | bmi2] custom(Visit) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

negb_m

negb: M(rm8[rw]) => 0xF6 /3 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

negl_m

negl: M(rm32[rw]) => 0xF7 /3 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

negq_m

negq: M(rm64[rw]) => REX.W + 0xF7 /3 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

negw_m

negw: M(rm16[rw]) => 0x66 + 0xF7 /3 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_1b

nop: 1B() => 0x90 [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_2b

nop: 2B() => 0x66 + 0x90 [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_3b

nop: 3B() => 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_4b

nop: 4B() => 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_5b

nop: 5B() => 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_6b

nop: 6B() => 0x66 + 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_7b

nop: 7B() => 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_8b

nop: 8B() => 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_9b

nop: 9B() => 0x66 + 0x0F + 0x1F [_64b | compat] custom(Encode | Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nop_zo

nop: ZO() => 0x90 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

nopl_m

nopl: M(rm32) => 0x0F + 0x1F /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

notb_m

notb: M(rm8[rw]) => 0xF6 /2 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

notl_m

notl: M(rm32[rw]) => 0xF7 /2 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

notq_m

notq: M(rm64[rw]) => REX.W + 0xF7 /2 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

notw_m

notw: M(rm16[rw]) => 0x66 + 0xF7 /2 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orb_i

orb: I(al[rw], imm8) => 0x0C ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orb_mi

orb: MI(rm8[rw], imm8) => 0x80 /1 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orb_mr

orb: MR(rm8[rw], r8) => 0x08 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orb_rm

orb: RM(r8[rw], rm8) => 0x0A /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orl_i

orl: I(eax[rw], imm32) => 0x0D id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orl_mi

orl: MI(rm32[rw], imm32) => 0x81 /1 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orl_mi_sxb

orl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /1 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orl_mr

orl: MR(rm32[rw], r32) => 0x09 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orl_rm

orl: RM(r32[rw], rm32) => 0x0B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orpd_a

orpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x56 /r [_64b | compat | sse2] (alternate: avx => vorpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orps_a

orps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x56 /r [_64b | compat | sse] (alternate: avx => vorps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orq_i_sxl

orq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x0D id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orq_mi_sxb

orq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /1 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orq_mi_sxl

orq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /1 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orq_mr

orq: MR(rm64[rw], r64) => REX.W + 0x09 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orq_rm

orq: RM(r64[rw], rm64) => REX.W + 0x0B /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orw_i

orw: I(ax[rw], imm16) => 0x66 + 0x0D iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orw_mi

orw: MI(rm16[rw], imm16) => 0x66 + 0x81 /1 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orw_mr

orw: MR(rm16[rw], r16) => 0x66 + 0x09 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

orw_rm

orw: RM(r16[rw], rm16) => 0x66 + 0x0B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pabsb_a

pabsb: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x1C [_64b | compat | ssse3] (alternate: avx => vpabsb_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pabsd_a

pabsd: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x1E [_64b | compat | ssse3] (alternate: avx => vpabsd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pabsw_a

pabsw: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x1D [_64b | compat | ssse3] (alternate: avx => vpabsw_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

packssdw_a

packssdw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x6B [_64b | compat | sse2] (alternate: avx => vpackssdw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

packsswb_a

packsswb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x63 [_64b | compat | sse2] (alternate: avx => vpacksswb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

packusdw_a

packusdw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x2B [_64b | compat | sse41] (alternate: avx => vpackusdw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

packuswb_a

packuswb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x67 [_64b | compat | sse2] (alternate: avx => vpackuswb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddb_a

paddb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xFC /r [_64b | compat | sse2] (alternate: avx => vpaddb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddd_a

paddd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xFE /r [_64b | compat | sse2] (alternate: avx => vpaddd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddq_a

paddq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD4 /r [_64b | compat | sse2] (alternate: avx => vpaddq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddsb_a

paddsb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xEC /r [_64b | compat | sse2] (alternate: avx => vpaddsb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddsw_a

paddsw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xED /r [_64b | compat | sse2] (alternate: avx => vpaddsw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddusb_a

paddusb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xDC /r [_64b | compat | sse2] (alternate: avx => vpaddusb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddusw_a

paddusw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xDD /r [_64b | compat | sse2] (alternate: avx => vpaddusw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

paddw_a

paddw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xFD /r [_64b | compat | sse2] (alternate: avx => vpaddw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

palignr_a

palignr: A(xmm1[rw], xmm_m128[align], imm8) => 0x66 + 0x0F + 0x3A 0x0F ib [_64b | compat | ssse3] (alternate: avx => vpalignr_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pand_a

pand: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xDB /r [_64b | compat | sse2] (alternate: avx => vpand_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pandn_a

pandn: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xDF /r [_64b | compat | sse2] (alternate: avx => vpandn_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pavgb_a

pavgb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE0 [_64b | compat | sse2] (alternate: avx => vpavgb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pavgw_a

pavgw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE3 [_64b | compat | sse2] (alternate: avx => vpavgw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pblendvb_rm

pblendvb: RM(xmm1[rw], xmm_m128[align], xmm0) => 0x66 + 0x0F + 0x38 0x10 /r [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pblendw_rmi

pblendw: RMI(xmm1[rw], xmm_m128[align], imm8) => 0x66 + 0x0F + 0x3A 0x0E /r ib [_64b | compat | sse41] (alternate: avx => vpblendw_rvmi) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpeqb_a

pcmpeqb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x74 [_64b | compat | sse2] (alternate: avx => vpcmpeqb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpeqd_a

pcmpeqd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x76 [_64b | compat | sse2] (alternate: avx => vpcmpeqd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpeqq_a

pcmpeqq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x29 [_64b | compat | sse41] (alternate: avx => vpcmpeqq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpeqw_a

pcmpeqw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x75 [_64b | compat | sse2] (alternate: avx => vpcmpeqw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpgtb_a

pcmpgtb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x64 [_64b | compat | sse2] (alternate: avx => vpcmpgtb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpgtd_a

pcmpgtd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x66 [_64b | compat | sse2] (alternate: avx => vpcmpgtd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpgtq_a

pcmpgtq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x37 [_64b | compat | sse42] (alternate: avx => vpcmpgtq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pcmpgtw_a

pcmpgtw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x65 [_64b | compat | sse2] (alternate: avx => vpcmpgtw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pextrb_a

pextrb: A(rm32[w], xmm2, imm8) => 0x66 + 0x0F + 0x3A 0x14 /r ib [_64b | compat | sse41] (alternate: avx => vpextrb_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pextrd_a

pextrd: A(rm32[w], xmm2, imm8) => 0x66 + 0x0F + 0x3A 0x16 /r ib [_64b | compat | sse41] (alternate: avx => vpextrd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pextrq_a

pextrq: A(rm64[w], xmm2, imm8) => 0x66 + REX.W + 0x0F + 0x3A 0x16 /r ib [_64b | sse41] (alternate: avx => vpextrq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pextrw_a

pextrw: A(r32[w], xmm2, imm8) => 0x66 + 0x0F + 0xC5 /r ib [_64b | compat | sse2] (alternate: avx => vpextrw_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pextrw_b

pextrw: B(rm32[w], xmm2, imm8) => 0x66 + 0x0F + 0x3A 0x15 /r ib [_64b | compat | sse41] (alternate: avx => vpextrw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

phaddd_a

phaddd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x02 /r [_64b | compat | ssse3] (alternate: avx => vphaddd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

phaddw_a

phaddw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x01 /r [_64b | compat | ssse3] (alternate: avx => vphaddw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pinsrb_a

pinsrb: A(xmm1[rw], rm32, imm8) => 0x66 + 0x0F + 0x3A 0x20 /r ib [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pinsrd_a

pinsrd: A(xmm1[rw], rm32, imm8) => 0x66 + 0x0F + 0x3A 0x22 /r ib [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pinsrq_a

pinsrq: A(xmm1[rw], rm64, imm8) => 0x66 + REX.W + 0x0F + 0x3A 0x22 /r ib [_64b | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pinsrw_a

pinsrw: A(xmm1[rw], rm32, imm8) => 0x66 + 0x0F + 0xC4 /r ib [_64b | compat | sse2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaddubsw_a

pmaddubsw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x04 [_64b | compat | ssse3] (alternate: avx => vpmaddubsw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaddwd_a

pmaddwd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF5 [_64b | compat | sse2] (alternate: avx => vpmaddwd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaxsb_a

pmaxsb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x3C /r [_64b | compat | sse41] (alternate: avx => vpmaxsb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaxsd_a

pmaxsd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x3D /r [_64b | compat | sse41] (alternate: avx => vpmaxsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaxsw_a

pmaxsw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xEE /r [_64b | compat | sse2] (alternate: avx => vpmaxsw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaxub_a

pmaxub: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xDE /r [_64b | compat | sse2] (alternate: avx => vpmaxub_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaxud_a

pmaxud: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x3F /r [_64b | compat | sse41] (alternate: avx => vpmaxud_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmaxuw_a

pmaxuw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x3E /r [_64b | compat | sse41] (alternate: avx => vpmaxuw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pminsb_a

pminsb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x38 /r [_64b | compat | sse41] (alternate: avx => vpminsb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pminsd_a

pminsd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x39 /r [_64b | compat | sse41] (alternate: avx => vpminsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pminsw_a

pminsw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xEA /r [_64b | compat | sse2] (alternate: avx => vpminsw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pminub_a

pminub: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xDA /r [_64b | compat | sse2] (alternate: avx => vpminub_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pminud_a

pminud: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x3B /r [_64b | compat | sse41] (alternate: avx => vpminud_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pminuw_a

pminuw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x3A /r [_64b | compat | sse41] (alternate: avx => vpminuw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovmskb_rm

pmovmskb: RM(r32[w], xmm2) => 0x66 + 0x0F + 0xD7 /r [_64b | compat | sse2] (alternate: avx => vpmovmskb_rm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovsxbd_a

pmovsxbd: A(xmm1[w], xmm_m32) => 0x66 + 0x0F + 0x38 0x21 /r [_64b | compat | sse41] (alternate: avx => vpmovsxbd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovsxbq_a

pmovsxbq: A(xmm1[w], xmm_m16) => 0x66 + 0x0F + 0x38 0x22 /r [_64b | compat | sse41] (alternate: avx => vpmovsxbq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovsxbw_a

pmovsxbw: A(xmm1[w], xmm_m64) => 0x66 + 0x0F + 0x38 0x20 /r [_64b | compat | sse41] (alternate: avx => vpmovsxbw_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovsxdq_a

pmovsxdq: A(xmm1[w], xmm_m64) => 0x66 + 0x0F + 0x38 0x25 /r [_64b | compat | sse41] (alternate: avx => vpmovsxdq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovsxwd_a

pmovsxwd: A(xmm1[w], xmm_m64) => 0x66 + 0x0F + 0x38 0x23 /r [_64b | compat | sse41] (alternate: avx => vpmovsxwd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovsxwq_a

pmovsxwq: A(xmm1[w], xmm_m32) => 0x66 + 0x0F + 0x38 0x24 /r [_64b | compat | sse41] (alternate: avx => vpmovsxwq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovzxbd_a

pmovzxbd: A(xmm1[w], xmm_m32) => 0x66 + 0x0F + 0x38 0x31 /r [_64b | compat | sse41] (alternate: avx => vpmovzxbd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovzxbq_a

pmovzxbq: A(xmm1[w], xmm_m16) => 0x66 + 0x0F + 0x38 0x32 /r [_64b | compat | sse41] (alternate: avx => vpmovzxbq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovzxbw_a

pmovzxbw: A(xmm1[w], xmm_m64) => 0x66 + 0x0F + 0x38 0x30 /r [_64b | compat | sse41] (alternate: avx => vpmovzxbw_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovzxdq_a

pmovzxdq: A(xmm1[w], xmm_m64) => 0x66 + 0x0F + 0x38 0x35 /r [_64b | compat | sse41] (alternate: avx => vpmovzxdq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovzxwd_a

pmovzxwd: A(xmm1[w], xmm_m64) => 0x66 + 0x0F + 0x38 0x33 /r [_64b | compat | sse41] (alternate: avx => vpmovzxwd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmovzxwq_a

pmovzxwq: A(xmm1[w], xmm_m32) => 0x66 + 0x0F + 0x38 0x34 /r [_64b | compat | sse41] (alternate: avx => vpmovzxwq_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmuldq_a

pmuldq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x28 /r [_64b | compat | sse41] (alternate: avx => vpmuldq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmulhrsw_a

pmulhrsw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x0B /r [_64b | compat | ssse3] (alternate: avx => vpmulhrsw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmulhuw_a

pmulhuw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE4 /r [_64b | compat | sse2] (alternate: avx => vpmulhuw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmulhw_a

pmulhw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE5 /r [_64b | compat | sse2] (alternate: avx => vpmulhw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmulld_a

pmulld: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x40 /r [_64b | compat | sse41] (alternate: avx => vpmulld_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmullw_a

pmullw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD5 /r [_64b | compat | sse2] (alternate: avx => vpmullw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pmuludq_a

pmuludq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF4 /r [_64b | compat | sse2] (alternate: avx => vpmuludq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popcntl_rm

popcntl: RM(r32[w], rm32) => 0xF3 + 0x0F + 0xB8 /r [_64b | compat | popcnt] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popcntq_rm

popcntq: RM(r64[w], rm64) => 0xF3 + REX.W + 0x0F + 0xB8 /r [_64b | popcnt] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popcntw_rm

popcntw: RM(r16[w], rm16) => 0xF3 + 0x66 + 0x0F + 0xB8 /r [_64b | compat | popcnt] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popq_m

popq: M(rm64[w]) => 0x8F /0 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popq_o

popq: O(r64[w]) => 0x58 +ro [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popw_m

popw: M(rm16[w]) => 0x66 + 0x8F /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

popw_o

popw: O(r16[w]) => 0x66 + 0x58 +rw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

por_a

por: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xEB /r [_64b | compat | sse2] (alternate: avx => vpor_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pshufb_a

pshufb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x38 0x00 [_64b | compat | ssse3] (alternate: avx => vpshufb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pshufd_a

pshufd: A(xmm1[w], xmm_m128[align], imm8) => 0x66 + 0x0F + 0x70 /r ib [_64b | compat | sse2] (alternate: avx => vpshufd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pshufhw_a

pshufhw: A(xmm1[w], xmm_m128[align], imm8) => 0xF3 + 0x0F + 0x70 /r ib [_64b | compat | sse2] (alternate: avx => vpshufhw_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pshuflw_a

pshuflw: A(xmm1[w], xmm_m128[align], imm8) => 0xF2 + 0x0F + 0x70 /r ib [_64b | compat | sse2] (alternate: avx => vpshuflw_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pslld_a

pslld: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF2 /r [_64b | compat | sse2] (alternate: avx => vpslld_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pslld_b

pslld: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x72 /6 ib [_64b | compat | sse2] (alternate: avx => vpslld_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psllq_a

psllq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF3 /r [_64b | compat | sse2] (alternate: avx => vpsllq_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psllq_b

psllq: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x73 /6 ib [_64b | compat | sse2] (alternate: avx => vpsllq_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psllw_a

psllw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF1 /r [_64b | compat | sse2] (alternate: avx => vpsllw_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psllw_b

psllw: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x71 /6 ib [_64b | compat | sse2] (alternate: avx => vpsllw_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrad_a

psrad: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE2 /r [_64b | compat | sse2] (alternate: avx => vpsrad_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrad_b

psrad: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x72 /4 ib [_64b | compat | sse2] (alternate: avx => vpsrad_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psraw_a

psraw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE1 /r [_64b | compat | sse2] (alternate: avx => vpsraw_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psraw_b

psraw: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x71 /4 ib [_64b | compat | sse2] (alternate: avx => vpsraw_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrld_a

psrld: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD2 /r [_64b | compat | sse2] (alternate: avx => vpsrld_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrld_b

psrld: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x72 /2 ib [_64b | compat | sse2] (alternate: avx => vpsrld_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrlq_a

psrlq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD3 /r [_64b | compat | sse2] (alternate: avx => vpsrlq_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrlq_b

psrlq: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x73 /2 ib [_64b | compat | sse2] (alternate: avx => vpsrlq_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrlw_a

psrlw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD1 /r [_64b | compat | sse2] (alternate: avx => vpsrlw_c) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psrlw_b

psrlw: B(xmm1[rw], imm8) => 0x66 + 0x0F + 0x71 /2 ib [_64b | compat | sse2] (alternate: avx => vpsrlw_d) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubb_a

psubb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF8 /r [_64b | compat | sse2] (alternate: avx => vpsubb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubd_a

psubd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xFA /r [_64b | compat | sse2] (alternate: avx => vpsubd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubq_a

psubq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xFB /r [_64b | compat | sse2] (alternate: avx => vpsubq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubsb_a

psubsb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE8 /r [_64b | compat | sse2] (alternate: avx => vpsubsb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubsw_a

psubsw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xE9 /r [_64b | compat | sse2] (alternate: avx => vpsubsw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubusb_a

psubusb: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD8 /r [_64b | compat | sse2] (alternate: avx => vpsubusb_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubusw_a

psubusw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xD9 /r [_64b | compat | sse2] (alternate: avx => vpsubusw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

psubw_a

psubw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xF9 /r [_64b | compat | sse2] (alternate: avx => vpsubw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

ptest_rm

ptest: RM(xmm1, xmm_m128[align])[flags:w] => 0x66 + 0x0F + 0x38 0x17 /r [_64b | compat | sse41] (alternate: avx => vptest_rm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpckhbw_a

punpckhbw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x68 /r [_64b | compat | sse2] (alternate: avx => vpunpckhbw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpckhdq_a

punpckhdq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x6A /r [_64b | compat | sse2] (alternate: avx => vpunpckhdq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpckhqdq_a

punpckhqdq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x6D /r [_64b | compat | sse2] (alternate: avx => vpunpckhqdq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpckhwd_a

punpckhwd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x69 /r [_64b | compat | sse2] (alternate: avx => vpunpckhwd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpcklbw_a

punpcklbw: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x60 /r [_64b | compat | sse2] (alternate: avx => vpunpcklbw_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpckldq_a

punpckldq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x62 /r [_64b | compat | sse2] (alternate: avx => vpunpckldq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpcklqdq_a

punpcklqdq: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x6C /r [_64b | compat | sse2] (alternate: avx => vpunpcklqdq_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

punpcklwd_a

punpcklwd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x61 /r [_64b | compat | sse2] (alternate: avx => vpunpcklwd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushq_i8

pushq: I8(imm8[sxq]) => 0x6A ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushq_i32

pushq: I32(imm32[sxq]) => 0x68 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushq_m

pushq: M(rm64) => 0xFF /6 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushq_o

pushq: O(r64) => 0x50 +ro [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushw_i16

pushw: I16(imm16) => 0x66 + 0x68 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushw_m

pushw: M(rm16) => 0x66 + 0xFF /6 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pushw_o

pushw: O(r16) => 0x66 + 0x50 +rw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

pxor_a

pxor: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0xEF /r [_64b | compat | sse2] (alternate: avx => vpxor_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rcpps_rm

rcpps: RM(xmm1[w], xmm_m128[align]) => 0x0F + 0x53 /r [_64b | compat | sse] (alternate: avx => vrcpps_rm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rcpss_rm

rcpss: RM(xmm1[w], xmm_m32) => 0xF3 + 0x0F + 0x53 /r [_64b | compat | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

retq_i

retq: I(imm16) => 0xC2 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

retq_zo

retq: ZO() => 0xC3 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolb_m1

rolb: M1(rm8[rw]) => 0xD0 /0 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolb_mc

rolb: MC(rm8[rw], cl) => 0xD2 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolb_mi

rolb: MI(rm8[rw], imm8) => 0xC0 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roll_m1

roll: M1(rm32[rw]) => 0xD1 /0 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roll_mc

roll: MC(rm32[rw], cl) => 0xD3 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roll_mi

roll: MI(rm32[rw], imm8) => 0xC1 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolq_m1

rolq: M1(rm64[rw]) => REX.W + 0xD1 /0 ib [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolq_mc

rolq: MC(rm64[rw], cl) => REX.W + 0xD3 /0 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolq_mi

rolq: MI(rm64[rw], imm8) => REX.W + 0xC1 /0 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolw_m1

rolw: M1(rm16[rw]) => 0x66 + 0xD1 /0 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolw_mc

rolw: MC(rm16[rw], cl) => 0x66 + 0xD3 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rolw_mi

rolw: MI(rm16[rw], imm8) => 0x66 + 0xC1 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorb_m1

rorb: M1(rm8[rw]) => 0xD0 /1 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorb_mc

rorb: MC(rm8[rw], cl) => 0xD2 /1 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorb_mi

rorb: MI(rm8[rw], imm8) => 0xC0 /1 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorl_m1

rorl: M1(rm32[rw]) => 0xD1 /1 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorl_mc

rorl: MC(rm32[rw], cl) => 0xD3 /1 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorl_mi

rorl: MI(rm32[rw], imm8) => 0xC1 /1 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorq_m1

rorq: M1(rm64[rw]) => REX.W + 0xD1 /1 ib [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorq_mc

rorq: MC(rm64[rw], cl) => REX.W + 0xD3 /1 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorq_mi

rorq: MI(rm64[rw], imm8) => REX.W + 0xC1 /1 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorw_m1

rorw: M1(rm16[rw]) => 0x66 + 0xD1 /1 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorw_mc

rorw: MC(rm16[rw], cl) => 0x66 + 0xD3 /1 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorw_mi

rorw: MI(rm16[rw], imm8) => 0x66 + 0xC1 /1 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorxl_rmi

rorxl: RMI(r32[w], rm32, imm8) => VEX.LZ.F2.0F3A.W0 0xF0 /r ib [_64b | compat | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rorxq_rmi

rorxq: RMI(r64[w], rm64, imm8) => VEX.LZ.F2.0F3A.W1 0xF0 /r ib [_64b | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roundpd_rmi

roundpd: RMI(xmm1[w], xmm_m128[align], imm8) => 0x66 + 0x0F + 0x3A 0x09 ib [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roundps_rmi

roundps: RMI(xmm1[w], xmm_m128[align], imm8) => 0x66 + 0x0F + 0x3A 0x08 ib [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roundsd_rmi

roundsd: RMI(xmm1[w], xmm_m64, imm8) => 0x66 + 0x0F + 0x3A 0x0B ib [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

roundss_rmi

roundss: RMI(xmm1[w], xmm_m32, imm8) => 0x66 + 0x0F + 0x3A 0x0A ib [_64b | compat | sse41] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rsqrtps_rm

rsqrtps: RM(xmm1[w], xmm_m128[align]) => 0x0F + 0x52 /r [_64b | compat | sse] (alternate: avx => vrsqrtps_rm) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

rsqrtss_rm

rsqrtss: RM(xmm1[w], xmm_m32) => 0xF3 + 0x0F + 0x52 /r [_64b | compat | sse] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarb_m1

sarb: M1(rm8[rw]) => 0xD0 /7 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarb_mc

sarb: MC(rm8[rw], cl) => 0xD2 /7 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarb_mi

sarb: MI(rm8[rw], imm8) => 0xC0 /7 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarl_m1

sarl: M1(rm32[rw]) => 0xD1 /7 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarl_mc

sarl: MC(rm32[rw], cl) => 0xD3 /7 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarl_mi

sarl: MI(rm32[rw], imm8) => 0xC1 /7 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarq_m1

sarq: M1(rm64[rw]) => REX.W + 0xD1 /7 ib [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarq_mc

sarq: MC(rm64[rw], cl) => REX.W + 0xD3 /7 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarq_mi

sarq: MI(rm64[rw], imm8) => REX.W + 0xC1 /7 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarw_m1

sarw: M1(rm16[rw]) => 0x66 + 0xD1 /7 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarw_mc

sarw: MC(rm16[rw], cl) => 0x66 + 0xD3 /7 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarw_mi

sarw: MI(rm16[rw], imm8) => 0x66 + 0xC1 /7 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarxl_rmv

sarxl: RMV(r32a[w], rm32, r32b) => VEX.LZ.F3.0F38.W0 0xF7 [_64b | compat | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sarxq_rmv

sarxq: RMV(r64a[w], rm64, r64b) => VEX.LZ.F3.0F38.W1 0xF7 [_64b | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbb_i

sbbb: I(al[rw], imm8) => 0x1C ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbb_mi

sbbb: MI(rm8[rw], imm8) => 0x80 /3 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbb_mr

sbbb: MR(rm8[rw], r8) => 0x18 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbb_rm

sbbb: RM(r8[rw], rm8) => 0x1A /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbl_i

sbbl: I(eax[rw], imm32) => 0x1D id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbl_mi

sbbl: MI(rm32[rw], imm32) => 0x81 /3 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbl_mi_sxb

sbbl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /3 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbl_mr

sbbl: MR(rm32[rw], r32) => 0x19 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbl_rm

sbbl: RM(r32[rw], rm32) => 0x1B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbq_i_sxl

sbbq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x1D id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbq_mi_sxb

sbbq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /3 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbq_mi_sxl

sbbq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /3 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbq_mr

sbbq: MR(rm64[rw], r64) => REX.W + 0x19 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbq_rm

sbbq: RM(r64[rw], rm64) => REX.W + 0x1B /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbw_i

sbbw: I(ax[rw], imm16) => 0x66 + 0x1D iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbw_mi

sbbw: MI(rm16[rw], imm16) => 0x66 + 0x81 /3 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbw_mr

sbbw: MR(rm16[rw], r16) => 0x66 + 0x19 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sbbw_rm

sbbw: RM(r16[rw], rm16) => 0x66 + 0x1B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

seta_m

seta: M(rm8[w])[flags:r] => 0x0F + 0x97 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setae_m

setae: M(rm8[w])[flags:r] => 0x0F + 0x93 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setb_m

setb: M(rm8[w])[flags:r] => 0x0F + 0x92 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setbe_m

setbe: M(rm8[w])[flags:r] => 0x0F + 0x96 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sete_m

sete: M(rm8[w])[flags:r] => 0x0F + 0x94 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setg_m

setg: M(rm8[w])[flags:r] => 0x0F + 0x9F /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setge_m

setge: M(rm8[w])[flags:r] => 0x0F + 0x9D /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setl_m

setl: M(rm8[w])[flags:r] => 0x0F + 0x9C /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setle_m

setle: M(rm8[w])[flags:r] => 0x0F + 0x9E /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setne_m

setne: M(rm8[w])[flags:r] => 0x0F + 0x95 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setno_m

setno: M(rm8[w])[flags:r] => 0x0F + 0x91 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setnp_m

setnp: M(rm8[w])[flags:r] => 0x0F + 0x9B /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setns_m

setns: M(rm8[w])[flags:r] => 0x0F + 0x99 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

seto_m

seto: M(rm8[w])[flags:r] => 0x0F + 0x90 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

setp_m

setp: M(rm8[w])[flags:r] => 0x0F + 0x9A /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sets_m

sets: M(rm8[w])[flags:r] => 0x0F + 0x98 /0 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sfence_zo

sfence: ZO() => 0x0F + 0xAE 0xF8 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlb_m1

shlb: M1(rm8[rw]) => 0xD0 /4 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlb_mc

shlb: MC(rm8[rw], cl) => 0xD2 /4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlb_mi

shlb: MI(rm8[rw], imm8) => 0xC0 /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shldl_mrc

shldl: MRC(rm32[rw], r32, cl) => 0x0F + 0xA5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shldl_mri

shldl: MRI(rm32[rw], r32, imm8) => 0x0F + 0xA4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shldq_mrc

shldq: MRC(rm64[rw], r64, cl) => REX.W + 0x0F + 0xA5 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shldq_mri

shldq: MRI(rm64[rw], r64, imm8) => REX.W + 0x0F + 0xA4 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shldw_mrc

shldw: MRC(rm16[rw], r16, cl) => 0x66 + 0x0F + 0xA5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shldw_mri

shldw: MRI(rm16[rw], r16, imm8) => 0x66 + 0x0F + 0xA4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shll_m1

shll: M1(rm32[rw]) => 0xD1 /4 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shll_mc

shll: MC(rm32[rw], cl) => 0xD3 /4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shll_mi

shll: MI(rm32[rw], imm8) => 0xC1 /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlq_m1

shlq: M1(rm64[rw]) => REX.W + 0xD1 /4 ib [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlq_mc

shlq: MC(rm64[rw], cl) => REX.W + 0xD3 /4 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlq_mi

shlq: MI(rm64[rw], imm8) => REX.W + 0xC1 /4 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlw_m1

shlw: M1(rm16[rw]) => 0x66 + 0xD1 /4 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlw_mc

shlw: MC(rm16[rw], cl) => 0x66 + 0xD3 /4 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlw_mi

shlw: MI(rm16[rw], imm8) => 0x66 + 0xC1 /4 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlxl_rmv

shlxl: RMV(r32a[w], rm32, r32b) => VEX.LZ.66.0F38.W0 0xF7 [_64b | compat | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shlxq_rmv

shlxq: RMV(r64a[w], rm64, r64b) => VEX.LZ.66.0F38.W1 0xF7 [_64b | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrb_m1

shrb: M1(rm8[rw]) => 0xD0 /5 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrb_mc

shrb: MC(rm8[rw], cl) => 0xD2 /5 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrb_mi

shrb: MI(rm8[rw], imm8) => 0xC0 /5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrl_m1

shrl: M1(rm32[rw]) => 0xD1 /5 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrl_mc

shrl: MC(rm32[rw], cl) => 0xD3 /5 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrl_mi

shrl: MI(rm32[rw], imm8) => 0xC1 /5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrq_m1

shrq: M1(rm64[rw]) => REX.W + 0xD1 /5 ib [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrq_mc

shrq: MC(rm64[rw], cl) => REX.W + 0xD3 /5 [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrq_mi

shrq: MI(rm64[rw], imm8) => REX.W + 0xC1 /5 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrw_m1

shrw: M1(rm16[rw]) => 0x66 + 0xD1 /5 ib [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrw_mc

shrw: MC(rm16[rw], cl) => 0x66 + 0xD3 /5 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrw_mi

shrw: MI(rm16[rw], imm8) => 0x66 + 0xC1 /5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrxl_rmv

shrxl: RMV(r32a[w], rm32, r32b) => VEX.LZ.F2.0F38.W0 0xF7 [_64b | compat | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shrxq_rmv

shrxq: RMV(r64a[w], rm64, r64b) => VEX.LZ.F2.0F38.W1 0xF7 [_64b | bmi2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shufpd_a

shufpd: A(xmm1[rw], xmm_m128[align], imm8) => 0x66 + 0x0F + 0xC6 ib [_64b | compat | sse2] (alternate: avx => vshufpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

shufps_a

shufps: A(xmm1[rw], xmm_m128[align], imm8) => 0x0F + 0xC6 ib [_64b | compat | sse] (alternate: avx => vshufps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sqrtpd_a

sqrtpd: A(xmm1[w], xmm_m128[align]) => 0x66 + 0x0F + 0x51 /r [_64b | compat | sse2] (alternate: avx => vsqrtpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sqrtps_a

sqrtps: A(xmm1[w], xmm_m128[align]) => 0x0F + 0x51 /r [_64b | compat | sse] (alternate: avx => vsqrtps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sqrtsd_a

sqrtsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x51 /r [_64b | compat | sse2] (alternate: avx => vsqrtsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

sqrtss_a

sqrtss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x51 /r [_64b | compat | sse] (alternate: avx => vsqrtss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subb_i

subb: I(al[rw], imm8) => 0x2C ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subb_mi

subb: MI(rm8[rw], imm8) => 0x80 /5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subb_mr

subb: MR(rm8[rw], r8) => 0x28 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subb_rm

subb: RM(r8[rw], rm8) => 0x2A /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subl_i

subl: I(eax[rw], imm32) => 0x2D id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subl_mi

subl: MI(rm32[rw], imm32) => 0x81 /5 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subl_mi_sxb

subl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /5 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subl_mr

subl: MR(rm32[rw], r32) => 0x29 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subl_rm

subl: RM(r32[rw], rm32) => 0x2B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subpd_a

subpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x5C /r [_64b | compat | sse2] (alternate: avx => vsubpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subps_a

subps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x5C /r [_64b | compat | sse] (alternate: avx => vsubps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subq_i_sxl

subq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x2D id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subq_mi_sxb

subq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /5 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subq_mi_sxl

subq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /5 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subq_mr

subq: MR(rm64[rw], r64) => REX.W + 0x29 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subq_rm

subq: RM(r64[rw], rm64) => REX.W + 0x2B /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subsd_a

subsd: A(xmm1[rw], xmm_m64) => 0xF2 + 0x0F + 0x5C /r [_64b | compat | sse2] (alternate: avx => vsubsd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subss_a

subss: A(xmm1[rw], xmm_m32) => 0xF3 + 0x0F + 0x5C /r [_64b | compat | sse] (alternate: avx => vsubss_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subw_i

subw: I(ax[rw], imm16) => 0x66 + 0x2D iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subw_mi

subw: MI(rm16[rw], imm16) => 0x66 + 0x81 /5 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subw_mr

subw: MR(rm16[rw], r16) => 0x66 + 0x29 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

subw_rm

subw: RM(r16[rw], rm16) => 0x66 + 0x2B /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testb_i

testb: I(al, imm8)[flags:w] => 0xA8 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testb_mi

testb: MI(rm8, imm8)[flags:w] => 0xF6 /0 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testb_mr

testb: MR(rm8, r8)[flags:w] => 0x84 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testl_i

testl: I(eax, imm32)[flags:w] => 0xA9 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testl_mi

testl: MI(rm32, imm32)[flags:w] => 0xF7 /0 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testl_mr

testl: MR(rm32, r32)[flags:w] => 0x85 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testq_i

testq: I(rax, imm32[sxq])[flags:w] => REX.W + 0xA9 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testq_mi

testq: MI(rm64, imm32[sxq])[flags:w] => REX.W + 0xF7 /0 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testq_mr

testq: MR(rm64, r64)[flags:w] => REX.W + 0x85 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testw_i

testw: I(ax, imm16)[flags:w] => 0x66 + 0xA9 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testw_mi

testw: MI(rm16, imm16)[flags:w] => 0x66 + 0xF7 /0 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

testw_mr

testw: MR(rm16, r16)[flags:w] => 0x66 + 0x85 [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

tzcntl_a

tzcntl: A(r32[w], rm32) => 0xF3 + 0x0F + 0xBC /r [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

tzcntq_a

tzcntq: A(r64[w], rm64) => 0xF3 + REX.W + 0x0F + 0xBC /r [_64b | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

tzcntw_a

tzcntw: A(r16[w], rm16) => 0xF3 + 0x66 + 0x0F + 0xBC /r [_64b | compat | bmi1] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

ucomisd_a

ucomisd: A(xmm1, xmm_m64)[flags:w] => 0x66 + 0x0F + 0x2E /r [_64b | compat | sse2] (alternate: avx => vucomisd_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

ucomiss_a

ucomiss: A(xmm1, xmm_m32)[flags:w] => 0x0F + 0x2E /r [_64b | compat | sse] (alternate: avx => vucomiss_a) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

ud2_zo

ud2: ZO() => 0x0F + 0x0B [_64b | compat] has_trap // cranelift/assembler-x64/meta/src/generate/inst.rs:14

unpckhps_a

unpckhps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x15 /r [_64b | compat | sse] (alternate: avx => vunpckhps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

unpcklpd_a

unpcklpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x14 /r [_64b | compat | sse2] (alternate: avx => vunpcklpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

unpcklps_a

unpcklps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x14 /r [_64b | compat | sse] (alternate: avx => vunpcklps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vaddpd_b

vaddpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x58 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vaddps_b

vaddps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x58 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vaddsd_b

vaddsd: B(xmm1[w], xmm2, xmm_m64) => VEX.128.F2.0F.WIG 0x58 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vaddss_b

vaddss: B(xmm1[w], xmm2, xmm_m32) => VEX.128.F3.0F.WIG 0x58 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vandnpd_b

vandnpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x55 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vandnps_b

vandnps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x55 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vandpd_b

vandpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x54 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vandps_b

vandps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x54 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vblendvpd_rvmr

vblendvpd: RVMR(xmm1[w], xmm2, xmm_m128, xmm3) => VEX.128.66.0F3A.W0 0x4B /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vblendvps_rvmr

vblendvps: RVMR(xmm1[w], xmm2, xmm_m128, xmm3) => VEX.128.66.0F3A.W0 0x4A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vbroadcastss_a_m

vbroadcastss: A_M(xmm1[w], m32) => VEX.128.66.0F38.W0 0x18 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vbroadcastss_a_r

vbroadcastss: A_R(xmm1[w], xmm2) => VEX.128.66.0F38.W0 0x18 /r [_64b | compat | avx2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcmppd_b

vcmppd: B(xmm1[w], xmm2, xmm_m128, imm8) => VEX.128.66.0F.WIG 0xC2 /r ib [_64b | compat | avx] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcmpps_b

vcmpps: B(xmm1[w], xmm2, xmm_m128, imm8) => VEX.128.0F.WIG 0xC2 /r ib [_64b | compat | avx] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcmpsd_b

vcmpsd: B(xmm1[w], xmm2, xmm_m64, imm8) => VEX.LIG.F2.0F.WIG 0xC2 /r ib [_64b | compat | avx] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcmpss_b

vcmpss: B(xmm1[w], xmm2, xmm_m32, imm8) => VEX.LIG.F3.0F.WIG 0xC2 /r ib [_64b | compat | avx] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtdq2pd_a

vcvtdq2pd: A(xmm1[w], xmm_m64) => VEX.128.F3.0F.WIG 0xE6 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtdq2ps_a

vcvtdq2ps: A(xmm1[w], xmm_m128) => VEX.128.0F.WIG 0x5B /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtpd2ps_a

vcvtpd2ps: A(xmm1[w], xmm_m128) => VEX.128.66.0F.WIG 0x5A /r [_64b | compat | avx] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtps2pd_a

vcvtps2pd: A(xmm1[w], xmm_m64) => VEX.128.0F.WIG 0x5A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsd2si_a

vcvtsd2si: A(r32[w], xmm_m64) => VEX.LIG.F2.0F.W0 0x2D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsd2si_aq

vcvtsd2si: AQ(r64[w], xmm_m64) => VEX.LIG.F2.0F.W1 0x2D /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsd2ss_b

vcvtsd2ss: B(xmm1[w], xmm2, xmm_m64) => VEX.LIG.F2.0F.WIG 0x5A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsi2sdl_b

vcvtsi2sdl: B(xmm1[w], xmm2, rm32) => VEX.LIG.F2.0F.W0 0x2A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsi2sdq_b

vcvtsi2sdq: B(xmm1[w], xmm2, rm64) => VEX.LIG.F2.0F.W1 0x2A /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsi2ssl_b

vcvtsi2ssl: B(xmm1[w], xmm2, rm32) => VEX.LIG.F3.0F.W0 0x2A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtsi2ssq_b

vcvtsi2ssq: B(xmm1[w], xmm2, rm64) => VEX.LIG.F3.0F.W1 0x2A /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtss2sd_b

vcvtss2sd: B(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x5A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtss2si_a

vcvtss2si: A(r32[w], xmm_m32) => VEX.LIG.F3.0F.W0 0x2D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvtss2si_aq

vcvtss2si: AQ(r64[w], xmm_m32) => VEX.LIG.F3.0F.W1 0x2D /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvttpd2dq_a

vcvttpd2dq: A(xmm1[w], xmm_m128) => VEX.128.66.0F.WIG 0xE6 /r [_64b | compat | avx] custom(Mnemonic) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvttps2dq_a

vcvttps2dq: A(xmm1[w], xmm_m128) => VEX.128.F3.0F.WIG 0x5B /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvttsd2si_a

vcvttsd2si: A(r32[w], xmm_m64) => VEX.LIG.F2.0F.W0 0x2C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvttsd2si_aq

vcvttsd2si: AQ(r64[w], xmm_m64) => VEX.LIG.F2.0F.W1 0x2C /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvttss2si_a

vcvttss2si: A(r32[w], xmm_m32) => VEX.LIG.F3.0F.W0 0x2C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vcvttss2si_aq

vcvttss2si: AQ(r64[w], xmm_m32) => VEX.LIG.F3.0F.W1 0x2C /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vdivpd_b

vdivpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x5E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vdivps_b

vdivps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x5E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vdivsd_b

vdivsd: B(xmm1[w], xmm2, xmm_m64) => VEX.LIG.F2.0F.WIG 0x5E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vdivss_b

vdivss: B(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x5E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vextractps_b

vextractps: B(rm32[w], xmm1, imm8) => VEX.128.66.0F3A.WIG 0x17 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd132pd_a

vfmadd132pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0x98 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd132ps_a

vfmadd132ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0x98 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd132sd_a

vfmadd132sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0x99 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd132ss_a

vfmadd132ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0x99 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd213pd_a

vfmadd213pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xA8 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd213ps_a

vfmadd213ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xA8 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd213sd_a

vfmadd213sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xA9 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd213ss_a

vfmadd213ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xA9 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd231pd_a

vfmadd231pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xB8 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd231ps_a

vfmadd231ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xB8 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd231sd_a

vfmadd231sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xB9 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmadd231ss_a

vfmadd231ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xB9 /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub132pd_a

vfmsub132pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0x9A /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub132ps_a

vfmsub132ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0x9A /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub132sd_a

vfmsub132sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0x9B /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub132ss_a

vfmsub132ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0x9B /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub213pd_a

vfmsub213pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xAA /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub213ps_a

vfmsub213ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xAA /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub213sd_a

vfmsub213sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xAB /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub213ss_a

vfmsub213ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xAB /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub231pd_a

vfmsub231pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xBA /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub231ps_a

vfmsub231ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xBA /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub231sd_a

vfmsub231sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xBB /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfmsub231ss_a

vfmsub231ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xBB /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd132pd_a

vfnmadd132pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0x9C /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd132ps_a

vfnmadd132ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0x9C /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd132sd_a

vfnmadd132sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0x9D /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd132ss_a

vfnmadd132ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0x9D /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd213pd_a

vfnmadd213pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xAC /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd213ps_a

vfnmadd213ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xAC /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd213sd_a

vfnmadd213sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xAD /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd213ss_a

vfnmadd213ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xAD /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd231pd_a

vfnmadd231pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xBC /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd231ps_a

vfnmadd231ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xBC /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd231sd_a

vfnmadd231sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xBD /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmadd231ss_a

vfnmadd231ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xBD /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub132pd_a

vfnmsub132pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0x9E /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub132ps_a

vfnmsub132ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0x9E /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub132sd_a

vfnmsub132sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0x9F /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub132ss_a

vfnmsub132ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0x9F /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub213pd_a

vfnmsub213pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xAE /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub213ps_a

vfnmsub213ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xAE /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub213sd_a

vfnmsub213sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xAF /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub213ss_a

vfnmsub213ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xAF /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub231pd_a

vfnmsub231pd: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W1 0xBE /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub231ps_a

vfnmsub231ps: A(xmm1[rw], xmm2, xmm_m128) => VEX.LIG.66.0F38.W0 0xBE /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub231sd_a

vfnmsub231sd: A(xmm1[rw], xmm2, xmm_m64) => VEX.LIG.66.0F38.W1 0xBF /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vfnmsub231ss_a

vfnmsub231ss: A(xmm1[rw], xmm2, xmm_m32) => VEX.LIG.66.0F38.W0 0xBF /r [_64b | compat | fma] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vinsertps_b

vinsertps: B(xmm1[w], xmm2, xmm_m32, imm8) => VEX.128.66.0F3A.WIG 0x21 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmaxpd_b

vmaxpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x5F /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmaxps_b

vmaxps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x5F /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmaxsd_b

vmaxsd: B(xmm1[w], xmm2, xmm_m64) => VEX.LIG.F2.0F.WIG 0x5F /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmaxss_b

vmaxss: B(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x5F /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vminpd_b

vminpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x5D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vminps_b

vminps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x5D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vminsd_b

vminsd: B(xmm1[w], xmm2, xmm_m64) => VEX.LIG.F2.0F.WIG 0x5D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vminss_b

vminss: B(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x5D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovapd_a

vmovapd: A(xmm1[w], xmm_m128[align]) => VEX.128.66.0F.WIG 0x28 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovapd_b

vmovapd: B(xmm_m128[w,align], xmm1) => VEX.128.66.0F.WIG 0x29 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovaps_a

vmovaps: A(xmm1[w], xmm_m128[align]) => VEX.128.0F.WIG 0x28 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovaps_b

vmovaps: B(xmm_m128[w,align], xmm1) => VEX.128.0F.WIG 0x29 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovd_a

vmovd: A(xmm1[w], rm32) => VEX.128.66.0F.W0 0x6E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovd_b

vmovd: B(rm32[w], xmm2) => VEX.128.66.0F.W0 0x7E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovddup_a

vmovddup: A(xmm1[w], xmm_m64) => VEX.128.F2.0F.WIG 0x12 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovdqa_a

vmovdqa: A(xmm1[w], xmm_m128[align]) => VEX.128.66.0F.WIG 0x6F /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovdqa_b

vmovdqa: B(xmm_m128[w,align], xmm1) => VEX.128.66.0F.WIG 0x7F /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovdqu_a

vmovdqu: A(xmm1[w], xmm_m128) => VEX.128.F3.0F.WIG 0x6F /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovdqu_b

vmovdqu: B(xmm_m128[w], xmm1) => VEX.128.F3.0F.WIG 0x7F /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovhps_b

vmovhps: B(xmm2[w], xmm1, m64) => VEX.128.0F.WIG 0x16 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovlhps_rvm

vmovlhps: RVM(xmm1[w], xmm2, xmm3) => VEX.128.0F.WIG 0x16 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovmskpd_rm

vmovmskpd: RM(r32[w], xmm2) => VEX.128.66.0F.WIG 0x50 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovmskps_rm

vmovmskps: RM(r32[w], xmm2) => VEX.128.0F.WIG 0x50 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovq_a

vmovq: A(xmm1[w], rm64) => VEX.128.66.0F.W1 0x6E /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovq_b

vmovq: B(rm64[w], xmm2) => VEX.128.66.0F.W1 0x7E /r [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovsd_b

vmovsd: B(xmm1[w], xmm2, xmm3) => VEX.LIG.F2.0F.WIG 0x10 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovsd_c_m

vmovsd: C_M(m64[w], xmm1) => VEX.LIG.F2.0F.WIG 0x11 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovsd_d

vmovsd: D(xmm1[w], m64) => VEX.LIG.F2.0F.WIG 0x10 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovss_b

vmovss: B(xmm1[w], xmm2, xmm3) => VEX.LIG.F3.0F.WIG 0x10 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovss_c_m

vmovss: C_M(m32[w], xmm1) => VEX.LIG.F3.0F.WIG 0x11 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovss_d

vmovss: D(xmm1[w], m32) => VEX.LIG.F3.0F.WIG 0x10 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovupd_a

vmovupd: A(xmm1[w], xmm_m128) => VEX.128.66.0F.WIG 0x10 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovupd_b

vmovupd: B(xmm_m128[w], xmm1) => VEX.128.66.0F.WIG 0x11 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovups_a

vmovups: A(xmm1[w], xmm_m128) => VEX.128.0F.WIG 0x10 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmovups_b

vmovups: B(xmm_m128[w], xmm1) => VEX.128.0F.WIG 0x11 /r [compat | _64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmulpd_b

vmulpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x59 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmulps_b

vmulps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x59 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmulsd_b

vmulsd: B(xmm1[w], xmm2, xmm_m64) => VEX.LIG.F2.0F.WIG 0x59 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vmulss_b

vmulss: B(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x59 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vorpd_b

vorpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x56 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vorps_b

vorps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x56 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpabsb_a

vpabsb: A(xmm1[w], xmm_m128) => VEX.128.66.0F38.WIG 0x1C [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpabsd_a

vpabsd: A(xmm1[w], xmm_m128) => VEX.128.66.0F38.WIG 0x1E [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpabsw_a

vpabsw: A(xmm1[w], xmm_m128) => VEX.128.66.0F38.WIG 0x1D [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpackssdw_b

vpackssdw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x6B [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpacksswb_b

vpacksswb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x63 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpackusdw_b

vpackusdw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x2B [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpackuswb_b

vpackuswb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x67 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddb_b

vpaddb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xFC [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddd_b

vpaddd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xFE [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddq_b

vpaddq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD4 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddsb_b

vpaddsb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xEC [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddsw_b

vpaddsw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xED [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddusb_b

vpaddusb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xDC [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddusw_b

vpaddusw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xDD [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpaddw_b

vpaddw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xFD [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpalignr_b

vpalignr: B(xmm1[w], xmm2, xmm_m128, imm8) => VEX.128.66.0F3A.WIG 0x0F ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpand_b

vpand: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xDB /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpandn_b

vpandn: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xDF /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpavgb_b

vpavgb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE0 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpavgw_b

vpavgw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE3 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpblendvb_rvmr

vpblendvb: RVMR(xmm1[w], xmm2, xmm_m128, xmm3) => VEX.128.66.0F3A.W0 0x4C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpblendw_rvmi

vpblendw: RVMI(xmm1[w], xmm2, xmm_m128, imm8) => VEX.128.66.0F3A.W0 0x0E /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpbroadcastb_a

vpbroadcastb: A(xmm1[w], xmm_m8) => VEX.128.66.0F38.W0 0x78 /r [_64b | compat | avx2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpbroadcastd_a

vpbroadcastd: A(xmm1[w], xmm_m32) => VEX.128.66.0F38.W0 0x58 /r [_64b | compat | avx2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpbroadcastq_a

vpbroadcastq: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.W0 0x59 /r [_64b | compat | avx2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpbroadcastw_a

vpbroadcastw: A(xmm1[w], xmm_m16) => VEX.128.66.0F38.W0 0x79 /r [_64b | compat | avx2] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpeqb_b

vpcmpeqb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x74 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpeqd_b

vpcmpeqd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x76 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpeqq_b

vpcmpeqq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x29 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpeqw_b

vpcmpeqw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x75 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpgtb_b

vpcmpgtb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x64 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpgtd_b

vpcmpgtd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x66 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpgtq_b

vpcmpgtq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x37 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpcmpgtw_b

vpcmpgtw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x65 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpextrb_a

vpextrb: A(rm32[w], xmm2, imm8) => VEX.128.66.0F3A.W0 0x14 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpextrd_a

vpextrd: A(rm32[w], xmm2, imm8) => VEX.128.66.0F3A.W0 0x16 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpextrq_a

vpextrq: A(rm64[w], xmm2, imm8) => VEX.128.66.0F3A.W1 0x16 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpextrw_a

vpextrw: A(r32[w], xmm2, imm8) => VEX.128.66.0F.W0 0xC5 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpextrw_b

vpextrw: B(rm32[w], xmm2, imm8) => VEX.128.66.0F3A.W0 0x15 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vphaddd_b

vphaddd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x02 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vphaddw_b

vphaddw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x01 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpinsrb_b

vpinsrb: B(xmm1[w], xmm2, rm32, imm8) => VEX.128.66.0F3A.W0 0x20 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpinsrd_b

vpinsrd: B(xmm1[w], xmm2, rm32, imm8) => VEX.128.66.0F3A.W0 0x22 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpinsrq_b

vpinsrq: B(xmm1[w], xmm2, rm64, imm8) => VEX.128.66.0F3A.W1 0x22 /r ib [_64b | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpinsrw_b

vpinsrw: B(xmm1[w], xmm2, rm32, imm8) => VEX.128.66.0F.W0 0xC4 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaddubsw_b

vpmaddubsw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x04 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaddwd_b

vpmaddwd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF5 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaxsb_b

vpmaxsb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x3C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaxsd_b

vpmaxsd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x3D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaxsw_b

vpmaxsw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xEE /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaxub_b

vpmaxub: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xDE /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaxud_b

vpmaxud: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x3F /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmaxuw_b

vpmaxuw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x3E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpminsb_b

vpminsb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x38 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpminsd_b

vpminsd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x39 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpminsw_b

vpminsw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xEA /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpminub_b

vpminub: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xDA /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpminud_b

vpminud: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x3B /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpminuw_b

vpminuw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x3A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovmskb_rm

vpmovmskb: RM(r32[w], xmm2) => VEX.128.66.0F.WIG 0xD7 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovsxbd_a

vpmovsxbd: A(xmm1[w], xmm_m32) => VEX.128.66.0F38.WIG 0x21 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovsxbq_a

vpmovsxbq: A(xmm1[w], xmm_m16) => VEX.128.66.0F38.WIG 0x22 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovsxbw_a

vpmovsxbw: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.WIG 0x20 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovsxdq_a

vpmovsxdq: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.WIG 0x25 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovsxwd_a

vpmovsxwd: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.WIG 0x23 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovsxwq_a

vpmovsxwq: A(xmm1[w], xmm_m32) => VEX.128.66.0F38.WIG 0x24 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovzxbd_a

vpmovzxbd: A(xmm1[w], xmm_m32) => VEX.128.66.0F38.WIG 0x31 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovzxbq_a

vpmovzxbq: A(xmm1[w], xmm_m16) => VEX.128.66.0F38.WIG 0x32 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovzxbw_a

vpmovzxbw: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.WIG 0x30 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovzxdq_a

vpmovzxdq: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.WIG 0x35 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovzxwd_a

vpmovzxwd: A(xmm1[w], xmm_m64) => VEX.128.66.0F38.WIG 0x33 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmovzxwq_a

vpmovzxwq: A(xmm1[w], xmm_m32) => VEX.128.66.0F38.WIG 0x34 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmuldq_b

vpmuldq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x28 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmulhrsw_b

vpmulhrsw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x0B [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmulhuw_b

vpmulhuw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE4 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmulhw_b

vpmulhw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE5 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmulld_b

vpmulld: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x40 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmullw_b

vpmullw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD5 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpmuludq_b

vpmuludq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF4 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpor_b

vpor: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xEB /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpshufb_b

vpshufb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F38.WIG 0x00 [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpshufd_a

vpshufd: A(xmm1[w], xmm_m128, imm8) => VEX.128.66.0F.WIG 0x70 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpshufhw_a

vpshufhw: A(xmm1[w], xmm_m128, imm8) => VEX.128.F3.0F.WIG 0x70 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpshuflw_a

vpshuflw: A(xmm1[w], xmm_m128, imm8) => VEX.128.F2.0F.WIG 0x70 /r ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpslld_c

vpslld: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF2 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpslld_d

vpslld: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x72 /6 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsllq_c

vpsllq: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF3 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsllq_d

vpsllq: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x73 /6 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsllw_c

vpsllw: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF1 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsllw_d

vpsllw: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x71 /6 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrad_c

vpsrad: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE2 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrad_d

vpsrad: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x72 /4 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsraw_c

vpsraw: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE1 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsraw_d

vpsraw: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x71 /4 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrld_c

vpsrld: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD2 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrld_d

vpsrld: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x72 /2 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrlq_c

vpsrlq: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD3 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrlq_d

vpsrlq: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x73 /2 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrlw_c

vpsrlw: C(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD1 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsrlw_d

vpsrlw: D(xmm1[w], xmm2, imm8) => VEX.128.66.0F.WIG 0x71 /2 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubb_b

vpsubb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF8 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubd_b

vpsubd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xFA /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubq_b

vpsubq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xFB /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubsb_b

vpsubsb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE8 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubsw_b

vpsubsw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xE9 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubusb_b

vpsubusb: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD8 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubusw_b

vpsubusw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xD9 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpsubw_b

vpsubw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xF9 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vptest_rm

vptest: RM(xmm1, xmm_m128)[flags:w] => VEX.128.66.0F38.WIG 0x17 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpckhbw_b

vpunpckhbw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x68 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpckhdq_b

vpunpckhdq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x6A /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpckhqdq_b

vpunpckhqdq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x6D /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpckhwd_b

vpunpckhwd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x69 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpcklbw_b

vpunpcklbw: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x60 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpckldq_b

vpunpckldq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x62 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpcklqdq_b

vpunpcklqdq: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x6C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpunpcklwd_b

vpunpcklwd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x61 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vpxor_b

vpxor: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0xEF /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vrcpps_rm

vrcpps: RM(xmm1[w], xmm_m128) => VEX.128.0F.WIG 0x53 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vrcpss_rvm

vrcpss: RVM(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x53 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vroundpd_rmi

vroundpd: RMI(xmm1[w], xmm_m128, imm8) => VEX.128.66.0F3A.WIG 0x09 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vroundps_rmi

vroundps: RMI(xmm1[w], xmm_m128, imm8) => VEX.128.66.0F3A.WIG 0x08 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vroundsd_rvmi

vroundsd: RVMI(xmm1[w], xmm2, xmm_m64, imm8) => VEX.LIG.66.0F3A.WIG 0x0B ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vroundss_rvmi

vroundss: RVMI(xmm1[w], xmm2, xmm_m32, imm8) => VEX.LIG.66.0F3A.WIG 0x0A ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vrsqrtps_rm

vrsqrtps: RM(xmm1[w], xmm_m128) => VEX.128.0F.WIG 0x52 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vrsqrtss_rvm

vrsqrtss: RVM(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x52 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vshufpd_b

vshufpd: B(xmm1[w], xmm2, xmm_m128, imm8) => VEX.128.66.0F.WIG 0xC6 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vshufps_b

vshufps: B(xmm1[w], xmm2, xmm_m128, imm8) => VEX.128.0F.WIG 0xC6 ib [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsqrtpd_b

vsqrtpd: B(xmm1[w], xmm_m128) => VEX.128.66.0F.WIG 0x51 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsqrtps_b

vsqrtps: B(xmm1[w], xmm_m128) => VEX.128.0F.WIG 0x51 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsqrtsd_b

vsqrtsd: B(xmm1[w], xmm2, xmm_m64) => VEX.LIG.F2.0F.WIG 0x51 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsqrtss_b

vsqrtss: B(xmm1[w], xmm2, xmm_m32) => VEX.LIG.F3.0F.WIG 0x51 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsubpd_b

vsubpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x5C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsubps_b

vsubps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x5C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsubsd_b

vsubsd: B(xmm1[w], xmm2, xmm_m64) => VEX.128.F2.0F.WIG 0x5C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vsubss_b

vsubss: B(xmm1[w], xmm2, xmm_m32) => VEX.128.F3.0F.WIG 0x5C /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vucomisd_a

vucomisd: A(xmm2, xmm_m64)[flags:w] => VEX.LIG.66.0F.WIG 0x2E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vucomiss_a

vucomiss: A(xmm2, xmm_m32)[flags:w] => VEX.LIG.0F.WIG 0x2E /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vunpckhps_b

vunpckhps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x15 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vunpcklpd_b

vunpcklpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x14 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vunpcklps_b

vunpcklps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x14 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vxorpd_b

vxorpd: B(xmm1[w], xmm2, xmm_m128) => VEX.128.66.0F.WIG 0x57 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

vxorps_b

vxorps: B(xmm1[w], xmm2, xmm_m128) => VEX.128.0F.WIG 0x57 /r [_64b | compat | avx] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xchgb_rm

xchgb: RM(r8[rw], m8[rw]) => 0x86 /r [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xchgl_rm

xchgl: RM(r32[rw], m32[rw]) => 0x87 /r [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xchgq_rm

xchgq: RM(r64[rw], m64[rw]) => REX.W + 0x87 /r [_64b] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xchgw_rm

xchgw: RM(r16[rw], m16[rw]) => 0x66 + 0x87 /r [_64b | compat] custom(Display) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorb_i

xorb: I(al[rw], imm8) => 0x34 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorb_mi

xorb: MI(rm8[rw], imm8) => 0x80 /6 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorb_mr

xorb: MR(rm8[rw], r8) => 0x30 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorb_rm

xorb: RM(r8[rw], rm8) => 0x32 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorl_i

xorl: I(eax[rw], imm32) => 0x35 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorl_mi

xorl: MI(rm32[rw], imm32) => 0x81 /6 id [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorl_mi_sxb

xorl: MI_SXB(rm32[rw], imm8[sxl]) => 0x83 /6 ib [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorl_mr

xorl: MR(rm32[rw], r32) => 0x31 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorl_rm

xorl: RM(r32[rw], rm32) => 0x33 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorpd_a

xorpd: A(xmm1[rw], xmm_m128[align]) => 0x66 + 0x0F + 0x57 /r [_64b | compat | sse2] (alternate: avx => vxorpd_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorps_a

xorps: A(xmm1[rw], xmm_m128[align]) => 0x0F + 0x57 /r [_64b | compat | sse] (alternate: avx => vxorps_b) // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorq_i_sxl

xorq: I_SXL(rax[rw], imm32[sxq]) => REX.W + 0x35 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorq_mi_sxb

xorq: MI_SXB(rm64[rw], imm8[sxq]) => REX.W + 0x83 /6 ib [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorq_mi_sxl

xorq: MI_SXL(rm64[rw], imm32[sxq]) => REX.W + 0x81 /6 id [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorq_mr

xorq: MR(rm64[rw], r64) => REX.W + 0x31 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorq_rm

xorq: RM(r64[rw], rm64) => REX.W + 0x33 /r [_64b] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorw_i

xorw: I(ax[rw], imm16) => 0x66 + 0x35 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorw_mi

xorw: MI(rm16[rw], imm16) => 0x66 + 0x81 /6 iw [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorw_mr

xorw: MR(rm16[rw], r16) => 0x66 + 0x31 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14

xorw_rm

xorw: RM(r16[rw], rm16) => 0x66 + 0x33 /r [_64b | compat] // cranelift/assembler-x64/meta/src/generate/inst.rs:14