Module inst

This module defines aarch64-specific machine instruction types.

Modules

args

AArch64 ISA definitions: instruction arguments.

emit

AArch64 ISA: binary code emission.

imms

AArch64 ISA definitions: immediate constants.

Structs

ASIMDFPModImm

Advanced SIMD modified immediate as used by the vector variant of FMOV.

ASIMDMovModImm

Advanced SIMD modified immediate as used by MOVI/MVNI.

FPULeftShiftImm

Floating-point unit immediate left shift.

FPURightShiftImm

Floating-point unit immediate right shift.

Imm12

A shifted immediate value in ‘imm12’ format: supports 12 bits, shifted left by 0 or 12 places.

ImmLogic

An immediate for logical instructions.

ImmShift

An immediate for shift instructions.

MoveWideConst

A 16-bit immediate for a MOVZ instruction, with a {0,16,32,48}-bit shift.

NZCV

An immediate that represents the NZCV flags.

ReturnCallInfo

Additional information for return_call[_ind] instructions, left out of line to lower the size of the Inst enum.

SImm9

a 9-bit signed offset.

SImm7Scaled

A signed, scaled 7-bit offset.

ShiftOpAndAmt

A shift operator with an amount, guaranteed to be within range.

ShiftOpShiftImm

A shift operator amount.

UImm5

An unsigned 5-bit immediate.

UImm12Scaled

An unsigned, scaled 12-bit offset.

Enums

ALUOp

Internal type ALUOp: defined at src/isa/aarch64/inst.isle line 1016.

ALUOp3

Internal type ALUOp3: defined at src/isa/aarch64/inst.isle line 1054.

AMode

Internal type AMode: defined at src/isa/aarch64/inst.isle line 1140.

APIKey

Internal type APIKey: defined at src/isa/aarch64/inst.isle line 1771.

AtomicRMWLoopOp

Internal type AtomicRMWLoopOp: defined at src/isa/aarch64/inst.isle line 1755.

AtomicRMWOp

Internal type AtomicRMWOp: defined at src/isa/aarch64/inst.isle line 1740.

BitOp

Internal type BitOp: defined at src/isa/aarch64/inst.isle line 1123.

BranchTarget

A branch target. Either unresolved (basic-block index) or resolved (offset from end of current instruction).

BranchTargetType

Internal type BranchTargetType: defined at src/isa/aarch64/inst.isle line 1784.

Cond

Condition for conditional branches.

CondBrKind

The kind of conditional branch: the common-case-optimized “reg-is-zero” / “reg-is-nonzero” variants, or the generic one that tests the machine condition codes.

ExtendOp

An extend operator for a register.

FPUOp1

Internal type FPUOp1: defined at src/isa/aarch64/inst.isle line 1402.

FPUOp2

Internal type FPUOp2: defined at src/isa/aarch64/inst.isle line 1412.

FPUOp3

Internal type FPUOp3: defined at src/isa/aarch64/inst.isle line 1423.

FPUOpRI

A floating-point unit (FPU) operation with two args, a register and an immediate.

FPUOpRIMod

A floating-point unit (FPU) operation with two args, a register and an immediate that modifies its dest (so takes that input value as a separate virtual register).

FpuRoundMode

Internal type FpuRoundMode: defined at src/isa/aarch64/inst.isle line 1463.

FpuToIntOp

Internal type FpuToIntOp: defined at src/isa/aarch64/inst.isle line 1436.

Inst

Internal type MInst: defined at src/isa/aarch64/inst.isle line 1.

IntToFpuOp

Internal type IntToFpuOp: defined at src/isa/aarch64/inst.isle line 1449.

LabelUse

Different forms of label references for different instruction formats.

MemLabel

A reference to some memory address.

MoveWideOp

Internal type MoveWideOp: defined at src/isa/aarch64/inst.isle line 1066.

OperandSize

Type used to communicate the operand size of a machine instruction, as AArch64 has 32- and 64-bit variants of many instructions (and integer registers).

PairAMode

Internal type PairAMode: defined at src/isa/aarch64/inst.isle line 1242.

ScalarSize

Type used to communicate the size of a scalar SIMD & FP operand.

ShiftOp

A shift operator for a register or immediate.

TestBitAndBranchKind

Internal type TestBitAndBranchKind: defined at src/isa/aarch64/inst.isle line 1266.

VecALUModOp

Internal type VecALUModOp: defined at src/isa/aarch64/inst.isle line 1572.

VecALUOp

Internal type VecALUOp: defined at src/isa/aarch64/inst.isle line 1485.

VecExtendOp

Internal type VecExtendOp: defined at src/isa/aarch64/inst.isle line 1476.

VecLanesOp

Internal type VecLanesOp: defined at src/isa/aarch64/inst.isle line 1713.

VecMisc2

Internal type VecMisc2: defined at src/isa/aarch64/inst.isle line 1583.

VecPairOp

Internal type VecPairOp: defined at src/isa/aarch64/inst.isle line 1694.

VecRRLongOp

Internal type VecRRLongOp: defined at src/isa/aarch64/inst.isle line 1644.

VecRRNarrowOp

Internal type VecRRNarrowOp: defined at src/isa/aarch64/inst.isle line 1659.

VecRRPairLongOp

Internal type VecRRPairLongOp: defined at src/isa/aarch64/inst.isle line 1702.

VecRRRLongModOp

Internal type VecRRRLongModOp: defined at src/isa/aarch64/inst.isle line 1685.

VecRRRLongOp

Internal type VecRRRLongOp: defined at src/isa/aarch64/inst.isle line 1673.

VecShiftImmModOp

Internal type VecShiftImmModOp: defined at src/isa/aarch64/inst.isle line 1733.

VecShiftImmOp

Internal type VecShiftImmOp: defined at src/isa/aarch64/inst.isle line 1722.

VectorSize

Type used to communicate the size of a vector operand.